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CAT24C05TDI-GT3

更新时间: 2024-02-10 20:11:23
品牌 Logo 应用领域
CATALYST 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
18页 434K
描述
2-Kb and 4-Kb I2C Serial EEPROM with Partial Array Write Protection

CAT24C05TDI-GT3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSOT
包装说明:ROHS COMPLIANT, MO-193, TSOT-23, 5 PIN针数:5
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.66
Is Samacsys:N最大时钟频率 (fCLK):0.4 MHz
数据保留时间-最小值:100耐久性:1000000 Write/Erase Cycles
I2C控制字节:101000MRJESD-30 代码:R-PDSO-G5
JESD-609代码:e4长度:2.9 mm
内存密度:4096 bit内存集成电路类型:EEPROM
内存宽度:8湿度敏感等级:1
功能数量:1端子数量:5
字数:512 words字数代码:512
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:512X8
封装主体材料:PLASTIC/EPOXY封装代码:VSSOP
封装等效代码:TSOP5/6,.11,37封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5 V
认证状态:Not Qualified座面最大高度:1 mm
串行总线类型:I2C最大待机电流:0.000001 A
子类别:EEPROMs最大压摆率:0.001 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.8 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.6 mm
最长写入周期时间 (tWC):5 ms写保护:HARDWARE
Base Number Matches:1

CAT24C05TDI-GT3 数据手册

 浏览型号CAT24C05TDI-GT3的Datasheet PDF文件第2页浏览型号CAT24C05TDI-GT3的Datasheet PDF文件第3页浏览型号CAT24C05TDI-GT3的Datasheet PDF文件第4页浏览型号CAT24C05TDI-GT3的Datasheet PDF文件第5页浏览型号CAT24C05TDI-GT3的Datasheet PDF文件第6页浏览型号CAT24C05TDI-GT3的Datasheet PDF文件第7页 
CAT24C03/05  
2-Kb and 4-Kb I2C Serial EEPROM with Partial Array Write Protection  
FEATURES  
DEVICE DESCRIPTION  
Supports Standard and Fast I2C Protocol  
1.8 V to 5.5 V Supply Voltage Range  
16-Byte Page Write Buffer  
The CAT24C03/CAT24C05 is a 2-kb/4-kb CMOS Serial  
EEPROM device organized internally as 16/32 pages  
of 16 bytes each, for a total of 256x8/512x8 bits. These  
devices support both Standard (100kHz) as well as Fast  
(400kHz) I2C protocol.  
Hardware Write Protection for upper half of  
memory  
Data is written by providing a starting address, then  
loading 1 to 16 contiguous bytes into a Page Write  
Buffer, and then writing all data to non-volatile memory  
in one internal write cycle. Data is read by providing a  
starting address and then shifting out data serially while  
automatically incrementing the internal address count.  
Schmitt Triggers and Noise Suppression Filters  
on I2C Bus Inputs (SCL and SDA).  
Low power CMOS technology  
1,000,000 program/erase cycles  
100 year data retention  
Writeoperationscanbeinhibitedforupperhalfofmemory  
by taking the WP pin High.  
Industrial temperature range  
RoHS-compliant 8-lead PDIP, SOIC, and TSSOP,  
External address pins make it possible to address  
up to eight CAT24C03 or four CAT24C05 devices on the  
same bus.  
8-pad TDFN and 5-lead TSOT-23 packages.  
For Ordering Information details, see page 17.  
PIN CONFIGURATION  
FUNCTIONAL SYMBOL  
PDIP (L)  
SOIC (W)  
TSSOP (Y)  
V
CC  
TDFN (VP2)  
TSOT-23 (TD)  
CAT24C05 03  
/
SCL  
1
2
3
5
WP  
NC  
A
A
A
A
1
2
3
4
8
7
6
5
V
CC  
/
0
1
2
SCL  
WP  
1 /  
2 /  
V
SS  
A
SCL  
SDA  
CAT24C03  
CAT24C05  
A , A , A  
2
1
0
SDA  
4
V
V
CC  
SS  
WP  
For the location of Pin 1, please consult the corresponding package drawing.  
PIN FUNCTIONS  
V
SS  
A0, A1, A2  
SDA  
SCL  
WP  
Device Address Inputs  
Serial Data Input/Output  
Serial Clock Input  
Write Protect Input  
Power Supply  
VCC  
VSS  
Ground  
NC  
No Connect  
* Catalyst carries the I2C protocol under a license from the Philips Corporation.  
© 2006 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1116, Rev. B  
1

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