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CAT1021YI-30-T3 PDF预览

CAT1021YI-30-T3

更新时间: 2024-02-15 10:11:28
品牌 Logo 应用领域
CATALYST 存储内存集成电路光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 203K
描述
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset and Watchdog Timer

CAT1021YI-30-T3 技术参数

是否Rohs认证:符合生命周期:Obsolete
包装说明:TSSOP, TSSOP8,.25Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
数据保留时间-最小值:100耐久性:1000000 Write/Erase Cycles
I2C控制字节:1010000RJESD-30 代码:R-PDSO-G8
JESD-609代码:e3内存密度:2048 bit
内存集成电路类型:EEPROM内存宽度:8
端子数量:8字数:256 words
字数代码:256最高工作温度:85 °C
最低工作温度:-40 °C组织:256X8
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:SERIAL
电源:3.3 V认证状态:Not Qualified
串行总线类型:I2C最大待机电流:0.00006 A
子类别:EEPROMs最大压摆率:0.003 mA
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
写保护:HARDWAREBase Number Matches:1

CAT1021YI-30-T3 数据手册

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CAT1021, CAT1022, CAT1023  
Supervisory Circuits with I2C Serial 2k-bit CMOS  
EEPROM, Manual Reset and Watchdog Timer  
FEATURES  
DESCRIPTION  
Precision Power Supply Voltage Monitor  
— 5V, 3.3V and 3V systems  
The CAT1021, CAT1022 and CAT1023 are complete  
memory and supervisory solutions for microcontroller-  
based systems. A 2k-bit serial EEPROM memory and a  
system power supervisor with brown-out protection are  
integrated together in low power CMOS technology.  
Memory interface is via a 400kHz I2C bus.  
— Five threshold voltage options  
Watchdog Timer  
Active High or Low Reset  
— Valid reset guaranteed at VCC = 1V  
400kHz I2C Bus  
The CAT1021 and CAT1023 provide a precision VCC  
sense circuit and two open drain outputs: one (RESET)  
¯¯¯¯¯¯  
drives high and the other (RESET) drives low whenever  
2.7V to 5.5V Operation  
VCC falls below the reset threshold voltage. The  
Low power CMOS technology  
16-Byte Page Write Buffer  
Built-in inadvertent write protection  
— WP pin (CAT1021)  
¯¯¯¯¯¯  
CAT1022 has only a RESET output and does not have  
a Write Protect input. The CAT1021 also has a Write  
Protect input (WP). Write operations are disabled if WP  
is connected to a logic high.  
All supervisors have a 1.6 second watchdog timer circuit  
that resets a system to a known state if software or a  
hardware glitch halts or “hangs” the system. For the  
CAT1021 and CAT1022, the watchdog timer monitors  
the SDA signal. The CAT1023 has a separate watchdog  
timer interrupt input pin, WDI.  
1,000,000 Program/Erase cycles  
Manual Reset Input  
100 year data retention  
Industrial and extended temperature ranges  
8-pin DIP, SOIC, TSSOP, MSOP or TDFN  
The power supply monitor and reset circuit protect  
memory and system controllers during power up/down  
and against brownout conditions. Five reset threshold  
voltages support 5V, 3.3V and 3V systems. If power  
supply voltages are out of tolerance reset signals  
become active, preventing the system microcontroller,  
ASIC or peripherals from operating. Reset signals  
become inactive typically 200 ms after the supply voltage  
exceeds the reset threshold level. With both active high  
and low reset signals, interface to microcontrollers and  
(3 x 3mm foot-print) packages  
— TDFN max height is 0.8mm  
¯¯¯¯¯¯  
other ICs is simple. In addition, the RESET pin or a  
¯¯¯  
separate input, MR, can be used as an input for push-  
button manual reset capability.  
For Ordering Information details, see page 19.  
The on-chip, 2k-bit EEPROM memory features a 16-byte  
page. In addition, hardware data protection is provided  
by a VCC sense circuit that prevents writes to memory  
whenever VCC falls below the reset threshold or until VCC  
reaches the reset threshold during power up.  
Available packages include an 8-pin DIP and surface  
mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN and 8-pin  
MSOP packages. The TDFN package thickness is  
0.8mm maximum. TDFN footprint options are 3 x 3mm.  
© Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
1
Doc. No. MD-3009 Rev. M  

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