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CAT1021LE-30

更新时间： 2024-11-23 18:50:15
品牌 Logo 应用领域
CATALYST 光电二极管
页数 文件大小 规格书
20页 149K
描述
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDIP8, LEAD AND HALOGEN FREE, PLASTIC, DIP-8

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CAT1021LE-30 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：DIP包装说明：DIP, DIP8,.3
针数：8Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.07可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDIP-T8
JESD-609代码：e3长度：9.59 mm
信道数量：1功能数量：1
端子数量：8最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP8,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：260电源：3.3/5 V
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：Power Management Circuits最大供电电流 (Isup)：3 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：NO
技术：CMOS温度等级：AUTOMOTIVE
端子面层：MATTE TIN端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：7.62 mm
Base Number Matches：1

CAT1021LE-30 数据手册

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E
CAT1021, CAT1022, CAT1023  
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset  
and Watchdog Timer  
TM  
FEATURES  
■ Precision power supply voltage monitor  
— 5V, 3.3V and 3V systems  
— Five threshold voltage options  
■ Watchdog timer  
■ Built-in inadvertent write protection  
— WP pin (CAT1021)  
■ 1,000,000 Program/Erase cycles  
■ Manual reset input  
■ Active high or low reset  
— Valid reset guaranteed at VCC = 1 V  
■ 400kHz I2C bus  
■ 100 year data retention  
■ 8-pin DIP, SOIC, TSSOP, MSOP or TDFN  
(3 x 3 mm foot-print) packages  
— TDFN max height is 0.8mm  
■ 3.0V to 5.5V operation  
■ Industrial and extended temperature ranges  
■ Low power CMOS technology  
■ 16-Byte page write buffer  
DESCRIPTION  
The CAT1021, CAT1022 and CAT1023 are complete The power supply monitor and reset circuit protect memory  
memory and supervisory solutions for microcontroller- and system controllers during power up/down and against  
based systems. A 2k-bit serial EEPROM memory and a brownout conditions. Five reset threshold voltages support  
system power supervisor with brown-out protection are 5V, 3.3V and 3V systems. If power supply voltages are out  
integrated together in low power CMOS technology. of tolerance reset signals become active, preventing the  
Memory interface is via a 400kHz I2C bus.  
systemmicrocontroller, ASICorperipheralsfromoperating.  
Reset signals become inactive typically 200 ms after the  
supply voltage exceeds the reset threshold level. With both  
activehighandlowresetsignals,interfacetomicrocontrollers  
and other ICs is simple. In addition, the RESET pin or a  
separate input, MR, can be used as an input for push-button  
manual reset capability.  
The CAT1021 and CAT1023 provide a precision VCC  
sense circuit and two open drain outputs: one (RESET)  
drives high and the other (RESET) drives low whenever  
VCC fallsbelowtheresetthresholdvoltage.TheCAT1022  
has only a RESET output and does not have a Write  
Protect input. The CAT1021 also has a Write Protect  
input (WP). Write operations are disabled if WP is The on-chip, 2k-bit EEPROM memory features a 16-byte  
connected to a logic high.  
page. In addition, hardware data protection is provided by a  
VCC sense circuit that prevents writes to memory whenever  
VCC falls below the reset threshold or until VCC reaches the  
reset threshold during power up.  
Allsupervisorshavea1.6secondwatchdogtimercircuit  
that resets a system to a known state if software or a  
hardware glitch halts or “hangs” the system. For the  
CAT1021 and CAT1022, the watchdog timer monitors Available packages include an 8-pin DIP, 8-pin SOIC, 8-pin  
theSDAsignal.TheCAT1023hasaseparatewatchdog TSSOP, 8-pin TDFN and 8-pin MSOP. The TDFN package  
timer interrupt input pin, WDI.  
thickness is 0.8mm maximum. TDFN footprint options are  
3x3mm.  
© 2004 by Catalyst Semiconductor, Inc.  
Doc No. 3009, Rev. K  
Characteristics subject to change without notice  
1234567...20

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