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2N4119 PDF预览

2N4119

更新时间: 2024-02-04 03:43:06
品牌 Logo 应用领域
CALOGIC 晶体放大器小信号场效应晶体管
页数 文件大小 规格书
1页 25K
描述
N-Channel JFET General Purpose Amplifier

2N4119 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TO-72
包装说明:CYLINDRICAL, O-MBCY-W4针数:4
Reach Compliance Code:compliantHTS代码:8541.21.00.95
风险等级:5.32Is Samacsys:N
配置:SINGLEFET 技术:JUNCTION
最大反馈电容 (Crss):1.5 pFJEDEC-95代码:TO-72
JESD-30 代码:O-MBCY-W4元件数量:1
端子数量:4工作模式:DEPLETION MODE
最高工作温度:175 °C封装主体材料:METAL
封装形状:ROUND封装形式:CYLINDRICAL
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
认证状态:Not Qualified子类别:Other Transistors
表面贴装:NO端子形式:WIRE
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:AMPLIFIER晶体管元件材料:SILICON
Base Number Matches:1

2N4119 数据手册

  
N-Channel JFET  
General Purpose Amplifier  
CORPORATION  
2N4117 – 2N4119 / 2N4117A – 2N4119A  
PN4117 – PN4119 / PN4117A – PN4119A / SST4117 – SST4119  
FEATURES  
PIN CONFIGURATION  
Low Leakage  
Low Capacitance  
ABSOLUTE MAXIMUM RATINGS  
(TA = 25oC unless otherwise noted)  
TO-92  
TO-72  
Gate-Source or Gate-Drain Voltage . . . . . . . . . . . . . . . . -40V  
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA  
Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC  
Operating Temperature Range . . . . . . . . . . . -55oC to +175oC  
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW  
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 2.0mW/oC  
C
G
G
S
S
D
D
SOT-23  
NOTE: Stresses above those listed under "Absolute Maximum  
Ratings" may cause permanent damage to the device. These are  
stress ratings only and functional operation of the device at these or  
any other conditions above those indicated in the operational sections  
of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
G
5007  
D
S
ORDERING INFORMATION  
PRODUCT MARKING (SOT-23)  
Part  
Package  
Temperature Range  
SST4117  
SST4118  
SST4119  
T17  
T18  
T19  
2N4117-19/A Hermetic TO-72  
PN4117-19/A Plastic TO-92  
SST4117-19 Plastic SOT-23  
-55oC to +175oC  
-55oC to +135oC  
-55oC to +135oC  
X2N4117-19/A Sorted Chips in Carriers -55oC to +175oC  
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified)  
4117/A  
4118/A  
4119/A  
SYMBOL  
PARAMETER  
UNITS  
V
TEST CONDITIONS  
MIN MAX MIN MAX MIN MAX  
-40 -40 -40  
BVGSS  
Gate-Source Breakdown Voltage  
Gate Reverse Current  
IG = -1µA, VDS = 0  
-10  
-1  
-10  
-1  
-10  
-1  
pA  
A devices  
A devices  
VGS = -20V, VDS = 0  
TA = +150oC  
IGSS  
-25  
-2.5  
-25  
-2.5  
-3  
-25  
-2.5  
-6  
nA  
V
VGS(off)  
IDSS  
gfs  
Gate-Source Pinch-Off Voltage  
-0.6 -1.8  
-1  
-2  
VDS = 10V, ID = 1nA  
VDS = 10V, VGS = 0  
0.02 0.09 0.08 0.24 0.20 0.60 mA  
70 210 80 250 100 330  
Drain Current at Zero Gate Voltage (Note 1)  
Common-Source Forward Transconductance (Note 1)  
Common-Source Forward Transconductance (Note 2)  
Common-Source Output Conductance  
VDS = 10V, f = 1kHz  
VGS = 0, f = 30MHz  
VDS = 10V, VGS = 0, f = 1kHz  
µS  
gfs  
60  
70  
90  
3
3
5
3
10  
3
gos  
V
DS = 10V, VGS = 0,  
f = 1MHz  
Ciss  
Crss  
Common-Source Input Capacitance (Note 2)  
pF  
V
DS = 10V, VGS = 0,  
f = 1MHz  
1.5  
1.5  
1.5  
Common-Source Reverse Transfer Capacitance (Note 2)  
NOTES: 1. Pulse test: Pulse duration of 2ms used during test.  
2. For design reference only, not 100% tested.  

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