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CAHCT1G126QDCKRG4Q PDF预览

CAHCT1G126QDCKRG4Q

更新时间: 2024-11-18 12:22:47
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
10页 235K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

CAHCT1G126QDCKRG4Q 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP, TSSOP5/6,.08针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:16 weeks风险等级:5.43
控制类型:ENABLE HIGH计数方向:UNIDIRECTIONAL
系列:AHCT/VHCT/VTJESD-30 代码:R-PDSO-G5
JESD-609代码:e4长度:2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A湿度敏感等级:1
位数:1功能数量:1
端口数量:2端子数量:5
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP5/6,.08封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260最大电源电流(ICC):0.01 mA
Prop。Delay @ Nom-Sup:16 ns传播延迟(tpd):16 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:1.25 mmBase Number Matches:1

CAHCT1G126QDCKRG4Q 数据手册

 浏览型号CAHCT1G126QDCKRG4Q的Datasheet PDF文件第2页浏览型号CAHCT1G126QDCKRG4Q的Datasheet PDF文件第3页浏览型号CAHCT1G126QDCKRG4Q的Datasheet PDF文件第4页浏览型号CAHCT1G126QDCKRG4Q的Datasheet PDF文件第5页浏览型号CAHCT1G126QDCKRG4Q的Datasheet PDF文件第6页浏览型号CAHCT1G126QDCKRG4Q的Datasheet PDF文件第7页 
SN74AHCT1G126-Q1  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS505B − JUNE 2003 − REVISED FEBRUARY 2008  
DCK PACKAGE  
(TOP VIEW)  
D
D
Qualified for Automotive Applications  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0),  
1000-V Charged-Device Model  
1
2
3
5
4
OE  
A
GND  
VCC  
Y
D
D
D
D
D
Operating Range of 3 V to 5.5 V  
Max t of 6 ns at 5 V  
pd  
Low Power Consumption, 10-µA Max I  
8-mA Output Drive at 5 V  
CC  
Inputs Are TTL-Voltage Compatible  
description/ordering information  
The SN74AHCT1G126 is a single bus buffer gate/line driver with 3-state output. The output is disabled when  
the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the  
driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
§
−40°C to 125°C  
SOT (SC-70) − DCK  
Reel of 3000  
CAHCT1G126QDCKRQ1  
BN_  
For the most current package and ordering information, see the Package Option Addendum at the end of this  
document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
The actual top-side marking has one additional character that designates the assembly/test site.  
§
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
X
Z
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CAHCT1G126QDCKRG4Q 替代型号

型号 品牌 替代类型 描述 数据表
CAHCT1G126QDCKRQ1 TI

完全替代

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
CAHCT1G126QDCKRG4 TI

完全替代

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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