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CA3252M

更新时间： 2024-01-13 22:00:32
品牌 Logo 应用领域
英特矽尔 - INTERSIL 驱动器栅
页数 文件大小 规格书
6页 56K
描述
Quad Gated Non-Inverting Power Driver

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中文翻译

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CA3252M 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：PLASTIC, MS-013AC, SOIC-20Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.7内置保护：TRANSIENT
驱动器位数：4输入特性：STANDARD
接口集成电路类型：AND GATE BASED PERIPHERAL DRIVERJESD-30 代码：R-PDSO-G20
JESD-609代码：e0功能数量：1
端子数量：20最高工作温度：105 °C
最低工作温度：-40 °C输出特性：OPEN-COLLECTOR
输出电流流向：SINK标称输出峰值电流：1 A
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：5 V认证状态：Not Qualified
子类别：Peripheral Drivers标称供电电压：5 V
表面贴装：YES技术：BIPOLAR
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL断开时间：10 µs
接通时间：10 µsBase Number Matches：1

CA3252M 数据手册

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CA3252  
Quad Gated Non-Inverting Power Driver  
March 1998  
Features  
Description  
• Four 600mA Non-Inverting Power Output Drivers  
• 50V and 1A Maximum Rated Power Output Drivers  
The CA3252 is used to interface low-level logic to high cur-  
rent loads. Each Power Driver has four inverting switches  
consisting of an inverting logic input stage and an inverting  
low-side driver output stage. All inputs are 5V TTL/CMOS  
logic compatible and have a common Enable input. On-chip  
steering diodes are connected from each output (in pairs) to  
the CLAMP pins (in pairs) which may be used in conjunction  
with external zener diodes to protect the IC against over-volt-  
age transients that result from inductive load switching. The  
CA3252 may be used in a variety of automotive and indus-  
trial control applications to drive relays, solenoids, lamps and  
small motors.  
• V  
CE(SUS)  
Capability . . . . . . . . . . . . . . . . . . . . . . . . .35V  
• Inputs Compatible With TTL or 5V CMOS Logic  
• Suitable For Resistive, Lamp or Inductive Loads  
• Inductive Clamps on Each Output  
• High Dissipation Power-Frame Package  
o
o
• Operating Temperature Ranges . . . . . . -40 C to 105 C  
To allow for maximum heat transfer from the chip, all ground  
pins on the DIP and SOIC packages are directly connected  
to the mounting pad of the chip. Integral heat spreading lead  
frames directly connect the bond pad and ground leads for  
good heat dissipation. In a typical application, the package is  
mounted on a copper PC Board. By increasing copper  
ground area on the PC Board, more heat is conducted away  
from the ground leads. The junction-to-ambient thermal  
Applications  
• Solenoids  
• Relays  
• Lamps  
• Steppers  
• Small Motors  
• Displays  
o
resistances may be reduced to less than 40 C/W with  
approximately two square inches of copper area.  
Ordering Information  
System Applications  
• Automotive  
PART  
NUMBER  
o
TEMP. ( C)  
-40 to 105  
-40 to 105  
PACKAGE  
16 Ld PDIP  
20 Ld SOIC  
PKG. NO.  
E16.3  
• Appliances  
CA3252E  
CA3252M  
• Industrial Controls  
• Robotics  
M20.3  
Pinouts  
CA3252E  
(PDIP)  
CA3252M  
(SOIC)  
TOP VIEW  
TOP VIEW  
1
2
3
4
5
6
7
8
9
OUT A  
IN A  
CLAMP AB  
NC  
20  
19  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
IN A  
OUT A  
CLAMP AB  
OUT B  
IN B  
NC  
18 INB  
ENABLE  
GND  
OUT B  
GND  
GND  
OUT C  
NC  
17 ENABLE  
16 GND  
GND  
GND  
GND  
15  
14 V  
GND  
OUT C  
V
CC  
CC  
CLAMP CD  
OUT D  
IN C  
IN D  
13 IN C  
12  
NC  
IN D  
CLAMP CD 10  
11 OUT D  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 1542.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1
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