Datasheet > C9821GQ

C9821GQ

更新时间： 2024-09-22 23:39:19

品牌	Logo	应用领域
其他 - ETC		时钟驱动器
页数	文件大小	规格书
18页	122K
描述
SINGLE CLOCK DRIVER\|SSOP\|24PIN\|PLASTIC

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C9821GQ 数据手册

APPROVED PRODUCT

C9821

Direct Rambus Plus Clock Generator

Product Features

Product Description

•

High Speed Clock support - provides a 267 to

400MHz differential clock source for Direct

Rambus memory systems for an 1.6 GbPS

data transfer rate

Synchronization Flexibility - provides signals to

synchronize the clock domains of the Rambus

Channel with an external system or processor

clock, provided by C9801, C9812, C9830,

C9840, C9850, C9851, and the C9853.

Power Management Support permits channel

clocks to be enabled and disabled as required

Supports Independent Channel Clocking

24 pin 150 mil SSOP Package

The C9821 is a Rambus compliant DRCG clock

synchronizer. It contains a Phase Locked Loop that

provides complimentary Rambus memory clocks.

Included in its functionality is the control logic to

phase and frequency synchronizing the device’s

output clocks with the system reference clock. Power

management logic is also provided for Mobile

application and green PC functionality. Also included

are separate power pins for each internal functional

block so as to minimize interaction of these sections

with each other and thus maximize the device

performance.

•

Supports Intel Architecture platforms

Pin Configuration

Block Diagram

VddlR

Refclk

VddP

REFCLK

PLL

MULT 0:1

VddO

VssO

Clk

VssP

VssI

Output

Control

Logic

CLK

CLKB

Phase

Aligner

PclkM

SynClkN

VssC

N/C

PCLKM

ClkB

VssO

VddO

Mult0

Mult1

SYNCLKN

VddC

VddlPD

StopB

PwrDnB

Test

Logic

S0:2

STOPB

Figure: 2

Figure: 1

Cypress Semiconductor Corporation

525 Los Coches St.

Document#: 38-07092 Rev. **

05/03/2001

Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571

http://www.cypress.com

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