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C8051F000-GQ PDF预览

C8051F000-GQ

更新时间: 2024-01-18 05:11:23
品牌 Logo 应用领域
芯科 - SILICON 闪存微控制器和处理器
页数 文件大小 规格书
2页 172K
描述
Microcontroller, 8-Bit, FLASH, 8051 CPU, 20MHz, CMOS, PQFP64, ROHS COMPLIANT, TQFP-64

C8051F000-GQ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:QFP
包装说明:TFQFP, TQFP64,.47SQ针数:64
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.75具有ADC:YES
地址总线宽度:位大小:8
CPU系列:8051最大时钟频率:19.2 MHz
DAC 通道:YESDMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQFP-G64
JESD-609代码:e3长度:10 mm
I/O 线路数量:32端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP封装等效代码:TQFP64,.47SQ
封装形状:SQUARE封装形式:FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/3.3 V
认证状态:Not QualifiedRAM(字节):256
ROM(单词):32768ROM可编程性:FLASH
座面最大高度:1.2 mm速度:20 MHz
子类别:Microcontrollers最大供电电压:3.6 V
最小供电电压:2.7 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

C8051F000-GQ 数据手册

 浏览型号C8051F000-GQ的Datasheet PDF文件第2页 
C8051F000  
20 MIPS, 32 kB Flash, 12-Bit ADC, 64-Pin Mixed-Signal MCU  
Analog Peripherals  
High-Speed 8051 µC Core  
12-Bit ADC  
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2  
system clocks  
-
-
-
-
-
-
±1 LSB INL; no missing codes  
-
Up to 20 MIPS throughput with 20 MHz system clock  
Expanded interrupt handler; up to 21 interrupt sources  
Programmable throughput up to 100 ksps  
8 external inputs; programmable as single-ended or differential  
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5  
Data-dependent windowed interrupt generator  
Built-in temperature sensor (±3 °C)  
-
Memory  
-
-
256 bytes data RAM  
32 kB Flash; in-system programmable in 512-byte sectors (512 bytes  
Two 12-bit DACs  
are reserved)  
-
Voltage output  
Digital Peripherals  
-
10 µsec settling time  
-
-
-
32 port I/O; all are 5 V tolerant  
Two Comparators  
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports  
-
16 programmable hysteresis values  
Configurable to generate interrupts or reset  
available concurrently  
-
Programmable 16-bit counter/timer array with five capture/compare  
modules  
Internal Voltage Reference  
-
4 general-purpose 16-bit counter/timers  
Dedicated watchdog timer; bidirectional reset  
V
Monitor/Brown-out Detector  
DD  
-
On-Chip JTAG Debug  
Clock Sources  
-
-
-
-
On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit  
emulation  
-
-
-
Internal programmable oscillator: 2-16 MHz  
External oscillator: Crystal, RC, C, or Clock  
Can switch between clock sources on-the-fly  
Supports breakpoints, single stepping, watchpoints, inspect/modify  
memory, and registers  
Superior performance to emulation systems using ICE-chips, target  
pods, and sockets  
Fully compliant with IEEE 1149.1 specification  
Supply Voltage: 2.7 to 3.6 V  
-
Typical operating current: 10 mA at 20 MHz  
Multiple power saving sleep and shutdown modes  
-
64-Pin TQFP  
Temperature Range: –40 to +85 °C  
VDD  
VDD  
P0.0  
P0.1  
P0.2  
P0.3  
P0.4  
P0.5  
P0.6  
P0.7  
P
0
VDD  
UART  
Digital Power  
C
DGND  
DGND  
DGND  
R
SMBus  
D
r
O
SPI Bus  
AV+  
S
v
AV+  
AGND  
AGND  
Analog Power  
5-Chnl  
S
PCA  
P1.0  
P1.1  
P1.2  
P1.3  
P1.4  
P1.5  
P1.6  
P1.7  
B
P
1
Timers  
32 kB  
A
TCK  
TMS  
TDI  
Boundary Scan  
Debug HW  
8
0
5
1
0,1,2  
FLASH  
JTAG  
Logic  
R
D
r
TDO  
Timer 3  
256 Byte  
RAM  
Reset  
v
S
RST  
Port 0  
W
Latch  
P2.0  
P2.1  
P2.2  
P2.3  
P2.4  
P2.5  
P2.6  
P2.7  
P
2
VDD  
WDT  
I
Monitor  
Port 1  
T
Latch  
D
r
C
External  
Oscillator  
Circuit  
C
o
r
XTAL1  
XTAL2  
Port 2  
H
Latch  
System Clock  
v
SFR Bus  
P3.0  
P3.1  
P3.2  
P3.3  
P3.4  
P3.5  
P3.6  
P3.7  
Internal  
P
3
Oscillator  
Port 3  
Latch  
e
VREF  
DAC1  
VREF  
D
r
DAC1  
v
(12-Bit)  
DAC0  
DAC0  
(12-Bit)  
AIN0.0  
AIN0.1  
AIN0.2  
AIN0.3  
AIN0.4  
AIN0.5  
AIN0.6  
AIN0.7  
ADC  
100 ksps  
(12-Bit)  
A
Prog  
Gain  
M
U
X
TEMP  
SENSOR  
CP0+  
CP0-  
CP1+  
CP1-  
CP0  
CP1  
Precision Mixed Signal  
Copyright © 2004 by Silicon Laboratories  
6.15.2004  

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