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BUK114-50L/S PDF预览

BUK114-50L/S

更新时间: 2024-11-12 23:37:19
品牌 Logo 应用领域
恩智浦 - NXP 外围驱动器驱动程序和接口接口集成电路
页数 文件大小 规格书
13页 147K
描述
Logic level TOPFET SMD version of BUK104-50L/S

BUK114-50L/S 技术参数

生命周期:Obsolete零件包装代码:SOT
包装说明:,针数:5
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVERJESD-30 代码:R-PSSO-G5
端子数量:5输出电流流向:SINK
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
表面贴装:YES端子形式:GULL WING
端子位置:SINGLEBase Number Matches:1

BUK114-50L/S 数据手册

 浏览型号BUK114-50L/S的Datasheet PDF文件第2页浏览型号BUK114-50L/S的Datasheet PDF文件第3页浏览型号BUK114-50L/S的Datasheet PDF文件第4页浏览型号BUK114-50L/S的Datasheet PDF文件第5页浏览型号BUK114-50L/S的Datasheet PDF文件第6页浏览型号BUK114-50L/S的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
Logic level TOPFET  
SMD version of BUK104-50L/S  
BUK114-50L/S  
DESCRIPTION  
QUICK REFERENCE DATA  
Monolithic temperature and  
overload protected logic level power  
MOSFET in a 5 pin surface  
mounting plastic envelope, intended  
as a general purpose switch for  
automotive systems and other  
applications.  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
VDS  
ID  
Continuous drain source voltage  
Continuous drain current  
50  
15  
V
A
W
˚C  
Ptot  
Tj  
Total power dissipation  
40  
Continuous junction temperature  
Drain-source on-state resistance  
150  
RDS(ON)  
VIS = 5 V  
VIS = 7 V  
125  
100  
m  
mΩ  
APPLICATIONS  
General controller for driving  
SYMBOL  
PARAMETER  
NOM.  
UNIT  
lamps  
motors  
solenoids  
heaters  
VPSN  
Protection supply voltage  
BUK114-50L  
BUK114-50S  
5
10  
V
V
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Vertical power DMOS output  
stage  
Low on-state resistance  
Logic and protection supply  
from separate pin  
Low operating supply current  
Overload protection against  
over temperature  
Overload protection against  
short circuit load  
PROTECTION SUPPLY  
DRAIN  
FLAG  
O/V  
CLAMP  
POWER  
INPUT  
MOSFET  
Latched overload protection  
reset by protection supply  
Protection circuit condition  
indicated by flag pin  
5 V logic compatible input level  
Separate input pin  
LOGIC AND  
PROTECTION  
for higher frequency drive  
ESD protection on input, flag  
and protection supply pins  
Over voltage clamping for turn  
off of inductive loads  
Both linear and switching  
operation are possible  
SOURCE  
Fig.1. Elements of the TOPFET.  
PINNING - SOT426  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
mb  
D
S
input  
flag  
TOPFET  
2
P
F
I
P
3
(connected to mb)  
protection supply  
source  
3
4
1 2  
4 5  
5
Fig. 2.  
Fig. 3.  
mb drain  
September 1996  
1
Rev 1.000  

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