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BUK106-50LP PDF预览

BUK106-50LP

更新时间: 2024-09-24 22:17:31
品牌 Logo 应用领域
恩智浦 - NXP 晶体外围驱动器驱动程序和接口晶体管
页数 文件大小 规格书
14页 146K
描述
PowerMOS transistor Logic level TOPFET

BUK106-50LP 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SFM包装说明:,
针数:5Reach Compliance Code:unknown
风险等级:5.92内置保护:TRANSIENT; OVER CURRENT; THERMAL
接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVERJESD-30 代码:R-PZFM-T5
功能数量:1端子数量:5
输出电流流向:SOURCE标称输出峰值电流:160 A
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:FLANGE MOUNT认证状态:Not Qualified
表面贴装:NO端子形式:THROUGH-HOLE
端子位置:ZIG-ZAGBase Number Matches:1

BUK106-50LP 数据手册

 浏览型号BUK106-50LP的Datasheet PDF文件第2页浏览型号BUK106-50LP的Datasheet PDF文件第3页浏览型号BUK106-50LP的Datasheet PDF文件第4页浏览型号BUK106-50LP的Datasheet PDF文件第5页浏览型号BUK106-50LP的Datasheet PDF文件第6页浏览型号BUK106-50LP的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
PowerMOS transistor  
Logic level TOPFET  
BUK106-50L/S  
BUK106-50LP/SP  
DESCRIPTION  
QUICK REFERENCE DATA  
Monolithic temperature and  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
overload protected logic level power  
MOSFET in a 5 pin plastic  
VDS  
ID  
Continuous drain source voltage  
Continuous drain current  
50  
50  
125  
150  
V
A
W
˚C  
envelope, intended as a general  
purpose switch for automotive  
systems and other applications.  
Ptot  
Tj  
Total power dissipation  
Continuous junction temperature  
Drain-source on-state resistance  
RDS(ON)  
APPLICATIONS  
VIS = 5 V  
VIS = 8 V  
35  
28  
m  
mΩ  
General controller for driving  
lamps  
SYMBOL  
PARAMETER  
NOM.  
UNIT  
motors  
solenoids  
heaters  
VPSN  
Protection supply voltage  
BUK106-50L  
BUK106-50S  
5
10  
V
V
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Vertical power DMOS output  
stage  
Low on-state resistance  
Logic and protection supply  
from separate pin  
Low operating supply current  
Overload protection against  
over temperature  
Overload protection against  
short circuit load  
PROTECTION SUPPLY  
DRAIN  
FLAG  
O/V  
CLAMP  
POWER  
INPUT  
MOSFET  
Latched overload protection  
reset by protection supply  
Protection circuit condition  
indicated by flag pin  
5 V logic compatible input level  
Separate input pin  
LOGIC AND  
PROTECTION  
for higher frequency drive  
ESD protection on input, flag  
and protection supply pins  
Over voltage clamping for turn  
off of inductive loads  
Both linear and switching  
operation are possible  
SOURCE  
Fig.1. Elements of the TOPFET.  
PINNING - SOT263  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
tab  
D
S
input  
flag  
TOPFET  
2
P
F
I
P
3
drain  
leadform  
263-01  
4
protection supply  
source  
1 2 3 4 5  
5
Fig. 2. Type numbers ending with  
suffix P refer to leadform 263-01.  
Fig. 3.  
tab drain  
February 1993  
1
Rev 1.200  

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