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BU4081BFV PDF预览

BU4081BFV

更新时间: 2024-11-27 22:48:35
品牌 Logo 应用领域
罗姆 - ROHM /
页数 文件大小 规格书
4页 52K
描述
Quad 2-input AND gate

BU4081BFV 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:LSSOP, SSOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.33系列:4000/14000/40000
JESD-30 代码:R-PDSO-G14JESD-609代码:e2
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:SSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5/15 V传播延迟(tpd):160 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.6 mm子类别:Gates
最大供电电压 (Vsup):16 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN COPPER端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:10宽度:4.4 mm
Base Number Matches:1

BU4081BFV 数据手册

 浏览型号BU4081BFV的Datasheet PDF文件第2页浏览型号BU4081BFV的Datasheet PDF文件第3页浏览型号BU4081BFV的Datasheet PDF文件第4页 
Standard ICs  
Quad 2-input AND gate  
BU4081B / BU4081BF / BU4081BFV  
The BU4081B, BU4081BF, and BU4081BFV are dual-input positive-logic AND gates with four circuits mounted on a  
single chip. An inverter-type buffer is added to the gate output, improving input / output transmission speed, and an  
increased load capacitance suppresses fluctuation in transmission time to a minimum.  
Features  
1) Low power dissipation.  
4) High fan-out.  
2) Wide range of operating power supply voltages.  
3) High input impedance.  
5) Direct drive of 2 L-TTL inputs and 1 LS-TTL input.  
Logic circuit diagram  
VDD  
OUT  
IN  
IN  
VSS  
Block diagram  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
A1  
B1  
VDD  
A4  
O1  
O2  
B2  
B4  
O4  
O3  
B3  
A2  
8
VSS  
A3  
1

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