Very Low Power CMOS SRAM
64K X 16 bit
BS616LV1010
Green package materials are compliant to RoHS
n FEATURES
ŸWide VCC operation voltage : 2.4V ~ 5.5V
n DESCRIPTION
The BS616LV1010 is a high performance, very low power CMOS
Static Random Access Memory organized as 65,536 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.02uA at 3.0V/25OC and maximum access time of 70ns at
2.4V/125OC.
ŸVery low power consumption :
VCC = 3.0V
VCC = 5.0V
Operation current : 20mA (Max.) at 70ns
2mA (Max.) at 1MHz
Standby current : 0.02uA (Typ.)at 25OC
Operation current : 40mA (Max.) at 70ns
5mA (Max.) at 1MHz
Standby current : 0.4uA (Typ.) at 25OC
ŸHigh speed access time :
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
-70
70ns(Max.) at VCC=2.4~5.5V
ŸAutomatic power down when chip is deselected
ŸEasy expansion with CE and OE options
ŸI/O Configuration x8/x16 selectable by LB and UB pin.
ŸThree state outputs and TTL compatible
ŸFully static operation
The BS616LV1010 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV1010 is available in DICE form, JEDEC standard
44-pin TSOP II and 48-ball BGA package.
ŸData retention supply voltage as low as 1.5V
n POWER CONSUMPTION
POWER DISSIPATION
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
TEMPERATURE
PKG TYPE
(ICC, Max)
(ICCSB1, Typ.)
(ICCSB1, Max)
VCC=5.0V
1MHz fMax.
VCC=3.0V
VCC=5.0V VCC=3.0V VCC=5.0V VCC=3.0V
1MHz
fMax.
BS616LV1010AA
BS616LV1010EA
BGA-48-0608
TSOP II-44
Automotive
Grade
0.4uA
0.02uA
20uA
8.0uA
5mA
40mA
2mA
20mA
-40OC to +125OC
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
44
A5
A6
A7
OE
UB
LB
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A8
A13
A15
Address
CE
512
Memory Array
9
A14
A12
A7
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A15
A14
A13
A12
NC
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
Input
Row
Decoder
9
Buffer
512 x 2048
10
11
12
13
14
15
16
17
18
19
20
21
22
A6
BS616LV1010EC
BS616LV1010EI
A5
A4
2048
DQ0
Data
Input
Buffer
16
16
16
Column I/O
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
.
16
.
Data
Output
Buffer
.
.
128
1
2
3
4
5
6
Column Decoder
DQ15
A
B
C
D
E
F
LB
D8
OE
A0
A1
A2
NC
7
CE
WE
OE
UB
LB
UB
D10
D11
D12
D13
NC
A3
A5
A4
A6
CE
D1
D0
D2
Address Input Buffer
Control
D9
A11 A9 A3 A2 A1 A0 A10
VCC
VSS
VSS
VCC
D14
D15
NC
NC
NC
A14
A12
A9
A7
D3
VCC
VSS
D6
NC
A15
A13
A10
D4
D5
G
H
WE
A11
D7
A8
NC
48-ball BGA top view
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
R0201-BS616LV1010A
Revision 2.5A
Mar. 2006
1