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BR24L32FJ PDF预览

BR24L32FJ

更新时间: 2024-11-06 23:35:39
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
2页 40K
描述
EEPROM

BR24L32FJ 数据手册

 浏览型号BR24L32FJ的Datasheet PDF文件第2页 
BR24L32-W/F-W/FJ-W*/FV-W  
BR24L64-W/F-W  
Features  
Pin Configurations  
• 32k bit serial EEPROM organized as 4k × 8bit (BR24L32)  
64k bit serial EEPROM organized as 8k × 8bit (BR24L64)  
• 2 wire bus serial interface (2 byte Address)  
8
7
A0  
A1  
1
2
3
4
Vcc  
WP  
A2  
6 SCL  
• Low operating voltage range (2V operating)  
Read : 1.8~5.5V  
GND  
5
SDA  
Write : 1.8~5.5V  
*
DIP8/SOP8/SOP-J8/SSOP-B8  
• Low current consumption  
Active : 3mA MAX  
DIP8/SOP8 (Only BR24L64)  
Standby : 2µA MAX  
Pin Functions  
• Clock frequency : 100kHz MAX (1.8~5.5V)  
400kHz MAX (2.5~5.5V)  
Functions  
Pin Names  
• Write cycle time : 5ms MAX  
Slave Address Inputs  
A0, A1, A2  
GND  
SDA  
• Address auto-increment function during read operation  
• Automatic erase-before-write function during write operation  
• Page write function : 32byte  
Ground  
Serial Data Input/Output  
Serial Data Clock  
• Inadvertent write protection function  
Inadvertent write protection at low voltage (Vcc Lock-out function)  
WP (Write Protect) function  
SCL  
WP  
Write Protect  
Power Supply  
• Schmitt trigger circuit and noise filter are built into SCL and  
Vcc  
SDA pins  
• 1,000,000 write cycle typical  
• 40 years data retention  
• Operating temperature range : -40~85˚C  
* Under development  
Block Diagram  
32~64k bit EEPROM Array  
WP  
A0  
12bit:BR24L32  
13bit:BR24L64  
8bit  
SCL  
SDA  
A1  
Address  
Decoder  
Slave Words  
Address Register  
Data  
Register  
12bit:BR24L32  
13bit:BR24L64  
A2  
START  
STOP  
Control Logic  
ACK  
High Voltage  
Generation  
Voltage Detection  
9

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