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BQ3285L PDF预览

BQ3285L

更新时间: 2024-11-28 22:27:51
品牌 Logo 应用领域
德州仪器 - TI 时钟
页数 文件大小 规格书
22页 148K
描述
Y2K-Enhanced Real-Time Clock (RTC)

BQ3285L 数据手册

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bq3285LF  
Y2K-Enhanced  
(
)
Real-Time Clock RTC  
General Description  
The bq3285LF write-protects the  
clock, calendar, and storage registers  
during power failure. A backup  
battery then maintains data and oper-  
ates the clock and calendar.  
Features  
The CMOS bq3285LF is a low-power  
microprocessor peripheral providing  
a time-of-day clock and 100-year cal-  
endar with alarm features and bat-  
tery operation. The architecture is  
based on the bq3285 RTC with added  
features: century bit, low-voltage op-  
eration, 32.768kHz output, 126 addi-  
tional bytes of CMOS, two shadow  
registers of last address used, and a  
day-of-month alarm to be compliant  
with the ACPI RTC specification.  
ACPI-compliant day-of-month  
alarm  
Y2K century bit  
The bq3285LF is a fully compatible  
real-time clock for IBM AT-  
compatible computers and other ap-  
plications. The only external compo-  
nents are a 32.768kHz crystal and a  
backup battery.  
Direct clock/calendar replace-  
ment for IBM® AT-compatible  
computers and other applications  
2 index shadow registers  
2.7–5.5V operation  
The bq3285LF is intended for use in  
3V systems; however, it may also op-  
erate at 5V and then go into a 3V  
power-down state, write-protecting  
as if in a 3V system.  
240 bytes of general nonvolatile  
storage  
A 32.768kHz output is available for  
sustaining power-management ac-  
tivities. The bq3285LF 32kHz out-  
put is always on whenever VCC is  
valid. In VCC standby mode, the  
32kHz is active, and the bq3285LF  
typically draws 100µA. Wake-up ca-  
pability is provided by an alarm in-  
terrupt, which is active in battery-  
backup mode. In battery-backup  
mode, current drain is less than  
550nA.  
Dedicated 32.768kHz output pin  
System wake-up capability—  
alarm interrupt output active in  
battery-backup mode  
Less than 0.55µA load under bat-  
tery operation  
Selectable Intel or Motorola bus  
timing  
24-pin plastic SSOP  
Pin Connections  
Pin Names  
AD0–AD7 Multiplexed address/  
data input/output  
32K  
32.768kHz output  
EXTRAM Extended RAM enable  
MOT  
CS  
Bus type select input  
Chip select input  
Address strobe input  
Data strobe input  
Read/write input  
Interrupt request output  
Reset input  
MOT  
24  
1
V
CC  
32k  
EXTRAM  
RCL  
BC  
RAM clear input  
3V backup cell input  
Crystal inputs  
X1  
X2  
23  
22  
2
3
4
RCL  
BC  
AD  
AD  
AD  
AD  
AD  
AD  
AD  
21  
20  
19  
18  
17  
16  
15  
14  
13  
0
1
2
3
4
5
6
AS  
5
X1–X2  
VCC  
6
INT  
RST  
DS  
DS  
7
Supply voltage input  
Ground  
8
9
R/W  
INT  
RST  
V
SS  
VSS  
10  
11  
12  
R/W  
AS  
CS  
AD  
7
V
SS  
24-Pin SSOP  
PN3285ED/LD.eps  
6/99 B  
1

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