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BQ2018

更新时间： 2024-10-27 22:48:27

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
21页	125K
描述
Power Minder⑩ IC

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中文翻译

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数据手册

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BQ2018 数据手册

bq2018

Power Minder™ IC

The bq2018 also features 128 bytes

of NVRAM registers. The upper 13

bytes of NVRAM contain the capac-

Features

General Description

➤ Multifunction charge/discharge The bq2018 is a low-cost charge/dis-

ity monitoring and status informa-

tion. The RBI input operates from

an external power storage source

such as a capacitor or a series cell in

the battery pack, providing register

nonvolatility for periods when the

battery is shorted to ground or when

the battery charge state is not suffi-

cient to operate the bq2018. During

this mode, the register backup cur-

rent is less than 100nA.

counter

charge counter peripheral packaged in

an 8-pin TSSOP or SOIC. It works

with an intelligent host controller, pro-

viding state-of-charge information for

rechargeable batteries.

➤ Resolves signals less than 12.5µV

➤ Internal offset calibration im-

proves accuracy

The bq2018 measures the voltage

drop across a low-value series sense

resistor between the negative termi-

nal of the battery and the battery

pack ground contact. By using the ac-

cumulated counts in the charge,

discharge, and self-discharge regis-

ters, an intelligent host controller can

determine battery state-of-charge in-

formation. To improve accuracy, an

offset count register is available. The

system host controller is responsible

for the register maintenance by reset-

ting the charge in/out and self-

discharge registers as needed.

➤ 1024 bits of NVRAM configured as

128 x 8

➤ Internal temperature sensor for

self-discharge estimation

Packaged in an 8-pin TSSOP or

SOIC, the bq2018 is small enough

to fit in the crevice between two A-

size cells or within the width of a

prismatic cell.

➤ Single-wire serial interface

➤ Dual operating modes:

- ^{Operating: <80µA}

- Sleep: <10µA

➤ REG output for low-cost mi-

croregulation

➤ Internal timebase eliminates ex-

ternal components

➤ 8-pin TSSOP or SOIC allows bat-

tery pack integration

Pin Connections

Pin Names

REG

V_CC

Regulator output

Supply voltage input

Ground

WAKE

SR1

Wake-up output

Current sense input 1

Current sense input 2

V_SS

SR2

REG

WAKE

SR1

SR2

RBI

HDQ

Data input/output

RBI

HDQ

8-Pin TSSOP or Narrow SOIC

PN-201801.eps

SLUS003–JUNE 1999 C

12 3 4 5 6 7...21

中文翻译

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