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BM29F04-12AC PDF预览

BM29F04-12AC

更新时间： 2024-11-19 18:18:11
品牌 Logo 应用领域
华邦 - WINBOND 内存集成电路
页数 文件大小 规格书
29页 196K
描述
Flash, 512KX8, 120ns, PQCC32

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中文翻译

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BM29F04-12AC 技术参数

是否Rohs认证： 不符合生命周期：Active
Reach Compliance Code：not_compliant风险等级：5.88
最长访问时间：120 ns命令用户界面：YES
数据轮询：YES耐久性：100000 Write/Erase Cycles
JESD-30 代码：R-PQCC-J32JESD-609代码：e0
内存密度：4194304 bit内存集成电路类型：FLASH
内存宽度：8部门数/规模：8
端子数量：32字数：524288 words
字数代码：512000最高工作温度：70 °C
最低工作温度：组织：512KX8
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC32,.5X.6封装形状：RECTANGULAR
封装形式：CHIP CARRIER并行/串行：PARALLEL
电源：5 V认证状态：Not Qualified
部门规模：64K最大待机电流：0.0001 A
子类别：Flash Memories最大压摆率：0.06 mA
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
切换位：YES类型：NOR TYPE
Base Number Matches：1

BM29F04-12AC 数据手册

 浏览型号BM29F04-12AC的Datasheet PDF文件第2页浏览型号BM29F04-12AC的Datasheet PDF文件第3页浏览型号BM29F04-12AC的Datasheet PDF文件第4页浏览型号BM29F04-12AC的Datasheet PDF文件第5页浏览型号BM29F04-12AC的Datasheet PDF文件第6页浏览型号BM29F04-12AC的Datasheet PDF文件第7页 
BRIGHT  
Microelectronics  
Inc.  
Preliminary BM29F040  
4 MEGABIT (512K ´ 8)  
5 VOLT SECTOR ERASE CMOS FLASH MEMORY  
GENERAL DESCRIPTION  
The BM29F040 is a 4 Megabit, 5.0 Volts only Flash memory device organized as 512K ´ 8 bits each.  
The BM29F040 is offered in an Industry standard 32-pin package which is backward compatible to 1  
Megabit and also pin compatible to EEPROMs. The device is offered in PDIP, PLCC and TSOP  
packages. The device is designed to be programmed and erased in system with the standard system  
5 Volt Vcc supply. An external 12.0 Volts Vpp is not required for program and erase operation. The  
device can also be reprogrammed in standard EPROM programmers.  
The BM29F040 offers access times between 70 to 150 nS. The device has separate chip enable  
(CE), write enable (WE ) and output enable (OE ) controls to eliminate bus contention.  
BMI flash memory technology reliably stores memory information even after 100,000 erase and  
program cycles. The BMI proprietary cell technology enhances the programming speeds and  
™
eliminates over erase problems seen in the classical ETOX type of Flash cell technologies. The  
combination of cell technology and internal circuit design techniques give reduced internal electrical  
fields and this provides improved reliability and endurance. The BM29F040 is entirely pin and  
command set compatible to the JEDEC standard 4 Megabit EEPROM. The commands are written to  
the Command State machine using standard microprocessor write timings. The internal Programming  
and Erase Algorithms are automatically implemented based on the input commands.  
The BM29F040 is programmed by executing the program command sequence. This will start the  
internal automatic program Algorithm that times the program pulse width and also verifies the proper  
cell margin. Erase is accomplished by executing the erase command sequence. The internal Power  
Switching State Machine automatically executes the algorithms and generates the necessary voltages  
and timings for the erase operation. The program and erase verify is also done internally and proper  
margin testing is automatically performed. This scheme unburdens the microprocessor or  
microcontroller from generating the program and erase algorithms by controlling all the necessary  
timings and voltages. The entire memory is typically erased in 1.5 seconds. No preprogramming is  
necessary in this technology.  
The BM29F040 also features a sector erase architecture. It is divided into 8 sectors of 64K bytes  
each. Each sector can be erased individually without affecting the data in other sectors or they can be  
erased in a random combination of groups. This multiple sector erase capability or full chip erase  
makes it very flexible to alter the data in BM29F040. To protect the data from accidental program or  
erase the device also has a sector protect or multiple sector protect function.  
The device features a single 5 Volt power supply for read, program and erase operation. Internally  
generated and well regulated voltages are provided for the program and erase operation. A low Vcc  
detector inhibits write operations during power transitions. The end of program or erase is detected by  
Data polling of DQ7 or by the Toggle Bit feature on DQ6. Once the program or erase cycle has been  
successfully completed, the device internally resets to Read mode.  
A Winbond Company  
Publication Release Date: June 1999  
Revision A1  
- 1 -  
1234567...29

中文翻译

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与BM29F04-12AC相关器件

型号 品牌 获取价格 描述 数据表
BM29F04-12AI WINBOND

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 		Flash, 512KX8, 120ns, PQCC32
BM29F04-12NC WINBOND

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 		Flash, 512KX8, 120ns, PDIP32
BM29F04-12NI WINBOND

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 		Flash, 512KX8, 120ns, PDIP32
BM29F04-12TC WINBOND

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 		Flash, 512KX8, 120ns, PDSO32
BM29F04-15AC WINBOND

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 		Flash, 512KX8, 150ns, PQCC32
BM29F04-15AI WINBOND

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 		Flash, 512KX8, 150ns, PQCC32
BM29F04-15NC WINBOND

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 		Flash, 512KX8, 150ns, PDIP32
BM29F04-15NI WINBOND

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 		Flash, 512KX8, 150ns, PDIP32
BM29F04-15TC WINBOND

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 		Flash, 512KX8, 150ns, PDSO32
BM29F04-15TI WINBOND

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 		Flash, 512KX8, 150ns, PDSO32

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