Datasheet > BCM8212

BCM8212

更新时间： 2024-09-25 06:41:39

品牌	Logo	应用领域
博通 - BOARDCOM		/
页数	文件大小	规格书
1页	95K
描述
TRANSCEIVER WITH INTERNAL LOOP TIMING AND PHASE DETECTOR

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中文翻译

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技术参数
数据手册

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BCM8212 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.78	Is Samacsys：	N
Base Number Matches：	1

BCM8212 数据手册

BCM8212

TRANSCEIVER WITH INTERNAL LOOP TIMING AND PHASE DETECTOR

S U M M A R Y O F B E N E F I T S

F E A T U R E S

2.488-Gbps SONET/SDH transceiver with dual differential

serial I/O

Low power consumption eliminates external heat sinks, fans

for system airflow, and expensive high current power supplies.

•

Fully integrated CDR, MUX, DEMUX, and CMU with 16-bit,

155.52-MHz LVPECL interface

Supports SONET dual-fiber ring architecture.8212-PB05-R

High integration reduces design cycle and time to market.

Provides increased port density per board and system.

Features low jitter: 3 mUI_RMStypical.

•

On-chip, PLL-based clock generator

Internal phase detector and charge pump for cleanup PLL

Line and system loopback modes

•

CMOS-based device uses the most effective silicon economy of

scale.

Loss-of-signal output (LOSB) and input (LOSIB)

TX and RX lock detect

Exceeds SONET jitter requirements, which allows the use of

low-cost optics.

•

Elastic buffering with FIFO overflow alarm

Selectable 77.76/155.52-MHz reference clock

Selectable RX clock and RX data squelch on LOS

Selectable loop timing mode

Target applications:

•

OC-48/STM-16 transmission equipment

SONET/SDH optical modules

ADD/DROP multiplexers

Digital cross-connects

Dual 2.5V/3.3V supplies

ATM switch backboneONET/SDH test equipment

SONET/SDH test equipment

Terabit and edge routers

Power dissipation: 1.2W typical

Selectable divide-by-32 or divide-by-16 receiver/ transmitter

low-speed parallel output clock

Standard CMOS fabrication process

23 ¥ 23 mm, 208-pin BGA package

•

Application Block Diagram

OTX

ORX

155

488

155.52 Mbps

OTX

中文翻译

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