PRELIMINARY DATA SHEET
BCM5220
10/100BASE-TX/FX Mini-Φ™ Transceiver
GENERAL DESCRIPTION
FEATURES
The BCM5220 is a single channel, low-power, 10/
100BASE-TX/FX transceiver targeting a number of
applications requiring intelligent power management and
robust network tolerance. The BCM5220 operates at
3.3V or 2.5V. The devices contain a full-duplex 10BASE-
T/100BASE-TX/100BASE-FX Fast Ethernet transceiver,
which performs all of the physical layer interface functions
for 10BASE-T Ethernet on CAT 3, 4, and 5 unshielded
twisted pair (UTP) cable and 100BASE-TX Fast Ethernet
on CAT 5 UTP cable. In addition, pin-compatibility with
the BCM5221 offers the flexibility of an upgrade path.
100BASE-FX is supported through the use of external
fiber-optic transmit and receive devices.
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Power Supply: 2.5V or 3.3V
Integrated Voltage Regulator to Allow Operation from
a Single Supply Source
Power Consumption: <275 mW
Unique Energy Detection Circuit to Enable Intelligent
Power Management
Cable Length Indication
Cable Noise Level Indication
Robust CESD Tolerance
Cable Length Greater Than 140 meters
Well Under 10 PPM Defect Ratio Quality
+10% Voltage Tolerance
Industrial Temperature Range (-40 to 85C)
MII and 7-wire Serial Interface Configurable
IEEE 1149.1 (JTAG) Scan Chain Support
MII Management Via Serial Port
Pin-compatible with BCM5221
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The BCM5220 is a highly integrated solution combining a
digital adaptive equalizer, ADC, phase lock loop, line
driver, encoder, decoder and all the required support
circuitry into a single monolithic CMOS chip. It complies
fully with the IEEE 802.3u specification, including the
Media Independent Interface (MII) and Auto-Negotiation
subsections.
10BASE-T/100BASE-TX/FX IEEE 802.3u Fast
Ethernet Transceiver
64-pin TQFP or 64-pin BGA Package
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APPLICATIONS
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PCMCIA/CardBus cards
LAN on motherboard
IP phones
The effective use of digital technology in the BCM5220
design results in robust performance over a broad range
of operating scenarios. Problems inherent to mixed-
signal implementations, such as analog offset and on-
chip noise, are eliminated by employing field proven
digital adaptive equalization and digital clock recovery
techniques.
Cable modems
Set-top boxes and print servers
Wireless access points
Embedded telecom
ADC
Figure 1: Functional Block Diagram
5220-DS04-405-R
04/20/04
16215 Alton Parkway • P.O. Box 57013 • Irvine, CA 92619-7013 • Phone: 949-450-8700 • Fax: 949-450-8710