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BCM43340XKUBG PDF预览

BCM43340XKUBG

更新时间: 2024-11-20 01:14:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 电信电信集成电路
页数 文件大小 规格书
96页 1349K
描述
Single-Chip, Dual-Band (2.4 GHz/5 GHz) IEEE 802.11 a/b/g/n MAC/Baseband/Radio with Integrated Bluetooth 4.0

BCM43340XKUBG 技术参数

生命周期:Obsolete包装说明:VFBGA,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.38JESD-30 代码:R-PBGA-B141
长度:5.67 mm功能数量:1
端子数量:141最高工作温度:85 °C
最低工作温度:-30 °C封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH座面最大高度:0.55 mm
标称供电电压:1.2 V表面贴装:YES
电信集成电路类型:TELECOM CIRCUIT温度等级:OTHER
端子形式:BALL端子节距:0.4 mm
端子位置:BOTTOM宽度:4.47 mm

BCM43340XKUBG 数据手册

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PRELIMINARY  
CYW43340  
Single-Chip, Dual-Band (2.4 GHz/5 GHz) IEEE 802.11 a/b/g/n  
MAC/Baseband/Radio with Integrated Bluetooth 4.0  
General Description  
The Cypress CYW43340 single–chip quad–radio device provides the highest level of integration for wearables, Internet of Things and  
gateway applications, with integrated dual band (2.4 GHz / 5 GHz) IEEE 802.11 a/b/g and single–stream IEEE 802.11n MAC/  
baseband/radio, and Bluetooth 4.0. The CYW43340 includes integrated power amplifiers and LNAs for the 2.4 GHz and 5 GHz WLAN  
bands, and an integrated 2.4 GHz T/R switch. This greatly reduces the external part count, PCB footprint, and cost of the solution.  
Using advanced design techniques and process technology to reduce active and idle power, the CYW43340 is designed to address  
the needs of mobile devices that require minimal power consumption and compact size. It includes a power management unit which  
simplifies the system power topology and allows for operation directly from a mobile platform battery while maximizing battery life.  
The CYW43340 implements the highly sophisticated Enhanced Collaborative Coexistence algorithms and hardware mechanisms,  
allowing for an extremely collaborative Bluetooth coexistence scheme along with coexistence support for external radios (such as  
cellular and LTE, GPS, WiMAX, and Ultra–Wideband) and a single shared 2.4 GHz antenna for Bluetooth and WLAN. As a result,  
enhanced overall quality for simultaneous voice, video, and data transmission in an IoT or wearable application is achieved.  
For the WLAN section, two host interface options are included: an SDIO v2.0 interface and a High-Speed Inter-Chip (HSIC) interface  
(a USB 2.0 derivative for short-distance on-board connections). An independent, high-speed UART is provided for the Bluetooth host  
interface.  
Cypress Part Numbering Scheme  
Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,  
there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides  
Cypress ordering part number that matches an existing IoT part number.  
Table 1. Mapping Table for Part Number between Broadcom and Cypress  
Broadcom Part Number  
Cypress Part Number  
BCM43340  
CYW43340  
BCM43340XKUBG  
BCM43340HKUBG  
CYW43340XKUBG  
CYW43340HKUBG  
Acronyms and Abbreviations  
In most cases, acronyms and abbreviations are defined on first use.  
For a comprehensive list of acronyms and other terms used in Cypress documents, go to http://www.cypress.com/glossary.  
Feautures  
IEEE 802.11x Key Features  
Dual–band 2.4 GHz and 5 GHz IEEE 802.11  
a/b/g/n  
Supports IEEE 802.15.2 external coexistence interface to  
optimize bandwidth utilization with other co–located wireless  
technologies such as GPS, WiMAX, or UWB  
Single–stream IEEE 802.11n support for 20 MHz and 40 MHz  
channels provides PHY layer rates up to 150 Mbps for typical  
upper–layer throughput in excess of 90 Mbps.  
Supports standard SDIO v2.0 host interfaces.  
Alternative host interface supports HSIC v1.0 (short–distance  
Supports the IEEE 802.11n STBC (space–time block coding)  
RX and LDPC (low–density parity check) TX options for  
improved range and power efficiency.  
USB device)  
Integrated ARM® Cortex–M3™ processor and on–chip  
memory for complete WLAN subsystem functionality,  
minimizing the need to wake up the applications processor for  
standard WLAN functions. This allows for further minimization  
of power consumption, while maintaining the ability to field  
upgrade with future features. On–chip memory includes 512  
KB SRAM and 640 KB ROM.  
Supportsasingle2.4 GHzantennasharedbetweenWLANand  
Bluetooth.  
Shared Bluetoothand 2.4 GHzWLAN receive signal path elimi-  
nates the need for an external power splitter while maintaining  
excellent sensitivity for both Bluetooth and WLAN.  
OneDriver™ software architecture for easy migration from  
existing embedded WLAN and Bluetooth devices as well as  
future devices.  
Internal fractional nPLL allows support for a wide range of  
reference clock frequencies  
Cypress Semiconductor Corporation  
Document Number: 002-14943 Rev. *L  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised Tuesday, March 28, 2017  

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