Datasheet > B55N03L

B55N03L

更新时间： 2024-02-10 18:39:13

品牌	Logo	应用领域
其他 - ETC		晶体晶体管
页数	文件大小	规格书
5页	415K
描述
N-Channel Logic Level E nhancement Mode Field E ffect Transistor

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B55N03L 数据手册

55N03L

S eptember , 2002

N-C hannel Logic Level E nhancement Mode Field E ffect Transistor

PR ODUCT S UMMAR Y

FE ATUR E S

S uper high dense cell design for extremely low R DS (ON).

High power and current handling capability.

TO-220 & TO-263 package.

VDS S

R DS (on) ( m

Ω

)

TYP

12.5 @ VG S = 10V

20 @ VG S = 4.5V

30V

55A

S DP S E R IE S

TO-220

S DB S E R IE S

TO-263(DD-P AK)

ABS OLUTE MAXIMUM R ATING S (TC =25 C unless otherwise noted)

Limit

Unit

P arameter

S ymbol

Drain-S ource Voltage

G S

G ate-S ource Voltage

Drain C urrent-C ontinuous @ TJ =125 C

-P ulsed

140

Drain-S ource Diode Forward C urrent

Maximum P ower Dissipation

@ Tc=25 C

Derate above 25 C

0.5

W / C

Operating and S torage Temperature R ange

, TS TG

-65 to 175

THE R MAL C HAR AC TE R IS TIC S

Thermal R esistance, J unction-to-C ase

C/W

J C

J A

2.5

62.5

Thermal R esistance, J unction-to-Ambient

12 3 4 5

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