Datasheet > AZ88943

AZ88943

更新时间： 2024-01-25 07:55:44

品牌	Logo	应用领域
AZM		放大器
页数	文件大小	规格书
5页	57K
描述
High-Speed Limiting Post Amplifier

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技术参数
数据手册

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AZ88943 技术参数

是否Rohs认证：	不符合	生命周期：	Contact Manufacturer
包装说明：	TSSOP, TSSOP10,.19,20	Reach Compliance Code：	compliant
风险等级：	5.9	JESD-30 代码：	R-PDSO-G10
JESD-609代码：	e0	功能数量：	1
端子数量：	10	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP10,.19,20
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：	3.3 V	认证状态：	Not Qualified
子类别：	ATM/SONET/SDH ICs	最大压摆率：	45 mA
标称供电电压：	3.3 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	DUAL	Base Number Matches：	1

AZ88943 数据手册

ARIZONA MICROTEK, INC.

AZ88943

High-Speed Limiting Post Amplifier

FEATURES

PACKAGE AVAILABILITY

•

Up to 2.5Gbps operation

PACKAGE

PART NUMBER

MARKING NOTES

AZ88

1,2,3

943

Differential PECL Inputs

Differential PECL Outputs

Open Drain TTL/CMOS SD Output

TTL/CMOS Enable Input

High-Speed SiGe Process

TSSOP 10

AZ88943U

Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K

parts) Tape & Reel.

Date code format: “Y” or “YY” for year followed by “WW” for week.

Parts marked JNB for date codes prior to 4WW (prior to 2004).

Date code “YWW” or “YYWW” on underside of part.

DESCRIPTION

The AZ88943 is a limiting post amplifier usable at data rates up to 2.5Gbps. It is ideal for use as a post

amplifier following a transimpedance amplifier.

The AZ88943 contains a programmable signal detect function to determine when the input signal is present.

This information can be used with the /EN input pin to disable the output under loss of signal conditions. The detect

threshold can be set with a resistor divider between V_CCand V_REF. The SD output is an open drain compatible with

CMOS and TTL.

The outputs produce standard PECL 100K voltage compensated levels.

PIN DESCRIPTION

D_IN, /D_IN

D_OUT, /D_OUT

/EN

FUNCTION

Differential Inputs

PECL Outputs

Output Enable

SD_LVL

V_REF

V_CC

GND

Signal Detect Threshold

SD Output

Reference Voltage Output

Positive Voltage

Ground

BLOCK DIAGRAM

D_IN

D_OUT

/D_IN

/D_OUT

PINOUT ASSIGNMENT

/EN

D_IN

V_CC

V_REF

D_OUT

/D_OUT

SD_LVL

TSSOP-10

/D_IN

V_REF

SD_LVL

GND

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5

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