Datasheet > AZ12010BL+

AZ12010BL+

更新时间： 2024-11-26 02:51:31

品牌	Logo	应用领域
AZM		时钟发生器
页数	文件大小	规格书
9页	257K
描述
Multiply by 16, 32 Phase-Locked Loop Clock Generator

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数据手册

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AZ12010BL+ 数据手册

ARIZONA MICROTEK, INC.

AZ12010

Multiply by 16, 32 Phase-Locked Loop Clock Generator

FEATURES

PACKAGE AVAILABILITY

•

Differential Inputs/Outputs for External

Voltage Controlled SAW Oscillator

Optional Internal Crystal Oscillator Driver

Internal Edge-Matching Phase/Frequency

Detector

Internal Charge-Pump/Integrator Amplifier

RF Bipolar Design for Low Phase Noise

Available in a 3x3 mm MLP Package

PACKAGE

PART NO.

MARKING

AZ12010A

NOTES

1,2

MLP 16 (3x3)

AZ12010AL

•

MLP 16 (3x3)

RoHS Compliant /

Lead (Pb) Free

AZ12010A+

AZ12010AL+

AZ12010BL

1,2

•

AZ12010B

MLP 16 (3x3)

RoHS Compliant /

Lead (Pb) Free

DIE

AZ12010B+

AZ12010BL+

AZ12010XP

1,2

N/A

Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)

Tape & Reel.

Date code format: “YY” for year followed by “WW” for week.

Waffle Pack

DESCRIPTION

The AZ12010 contains all of the functional elements necessary to implement a Phase-Locked Loop for clock

multiplication at frequencies up to 800 MHz. A fixed 32 times multiplication allows the use of low cost crystals or a

low frequency reference signal. The output can be divided by two for 16 times net multiplication. The VCSO is

differentially or single-ended driven using the chip CML SAW outputs. The dynamic properties of the PLL are

under the control of the user through selection of the desired external components.

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5 6 7...9

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