Datasheet > AZ10LVEL16VST

AZ10LVEL16VST

更新时间： 2024-11-08 04:33:23

品牌	Logo	应用领域
AZM		/
页数	文件大小	规格书
8页	101K
描述
ECL/PECL Differential Receiver with Variable Output Swing

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AZ10LVEL16VST 数据手册

ARIZONA MICROTEK, INC.

AZ10LVEL16VS

AZ100LVEL16VS

ECL/PECL Differential Receiver with Variable Output Swing

FEATURES

PACKAGE AVAILABILITY

•

250ps Propagation Delay

PACKAGE

PART NUMBER

MARKING NOTES

High Bandwidth Output Transitions

Operating Range of 3.0V to 5.5V

Internal Input Pulldown Resistors

Functionally Equivalent to ON

Semiconductor MC10EL16,

MC100EL16 & MC100LVEL16

Variable Output Swing

AZM10

LV16VS

SOIC 8

AZ10LVEL16VSD

1,2

AZM100

LV16VS

SOIC 8

AZ100LVEL16VSD

AZ10LVEL16VST

AZ100LVEL16VST

1,2

AZT

L16VS

TSSOP 8

1,2

AZH

L16VS

•

1,2

Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)

Tape & Reel.

Date code format: “Y” or “YY” for year followed by “WW” for week on

underside of part.

DESCRIPTION

The

AZ10/100LVEL16VS

differential receiver with variable output swing. The LVEL16VS has functionality and output transition times

similar to the EL16, with an input that controls the amplitude of the Q/Q¯ outputs.

The operational range of the LVEL16VS control input, V_CTRL, is from V_BB(full swing) to V_CC(min. swing).

Maximum swing is achieved by leaving the V_CTRLpin open or by tying it to the negative supply (V_EE). Simple

control of the output swing can be obtained by a variable resistor between the V_BBand V_CCpins, with the wiper

driving V_CTRL. Typical application circuits and results are described in this Data Sheet.

The LVEL16VS provides a V_BBoutput for single-ended use or a DC bias reference for AC coupling to the

device. For single-ended input applications, the V_BBreference should be connected to one side of the D/D¯

differential input pair. The input signal is then fed to the other D/D¯ input. The V_BBpin can support 1.5mA

sink/source current. When used, the V_BBpin should be bypassed to ground via a 0.01μF capacitor.

Under open input conditions internal input clamps will force the Q output LOW.

NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.

PIN DESCRIPTION

CTRL

D, D¯

V_CTRL

Q, Q¯

V_BB

FUNCTION

Data Inputs

Output Swing Control

Data Outputs

Reference Voltage Output

Positive Supply

Negative Supply

V_CC

V_EE

LOGIC DIAGRAM AND PINOUT ASSIGNMENT

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5 6 7 8

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与AZ10LVEL16VST相关器件

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AZ1117_13	BCDSEMI	获取价格	1A LOW DROPOUT LINEAR REGULATOR
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AZ1117B_07	BCDSEMI	获取价格	800mA LOW DROPOUT LINEAR REGULATOR

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