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AZ10/100EP16VSL PDF预览

AZ10/100EP16VSL

更新时间: 2024-11-10 03:20:03
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AZM /
页数 文件大小 规格书
10页 122K
描述
ECL/PECL Differential Receiver with Variable Output Swing

AZ10/100EP16VSL 数据手册

 浏览型号AZ10/100EP16VSL的Datasheet PDF文件第2页浏览型号AZ10/100EP16VSL的Datasheet PDF文件第3页浏览型号AZ10/100EP16VSL的Datasheet PDF文件第4页浏览型号AZ10/100EP16VSL的Datasheet PDF文件第5页浏览型号AZ10/100EP16VSL的Datasheet PDF文件第6页浏览型号AZ10/100EP16VSL的Datasheet PDF文件第7页 
ARIZONA MICROTEK, INC.  
AZ10EP16VS  
AZ100EP16VS  
ECL/PECL Differential Receiver with Variable Output Swing  
FEATURES  
PACKAGE AVAILABILITY  
Silicon-Germanium for High Speed  
Operation  
150ps Typical Propagation Delay  
AZ100EP16VS Functionally Equivalent  
to ON Semiconductor MC100EP16VS  
at 3.3V  
Available in a 3x3mm MLP Package  
S-Parameter (.s2p) and IBIS Model Files  
available on Arizona Microtek Website  
PACKAGE  
PART NUMBER  
MARKING NOTES  
AZM10  
EP16VS  
SOIC 8  
AZ10EP16VSD  
1,2,3  
AZM100  
EP16VS  
SOIC 8  
AZ100EP16VSD  
AZ10EP16VST  
AZ100EP16VST  
1,2,3  
AZTP  
EP16VS  
TSSOP 8  
TSSOP 8  
1,2,3  
AZHP  
EP16VS  
1,2,3  
AZM  
MLP 16 (3x3)  
AZ10/100EP16VSL  
AZ10/100EP16VSL+  
16S  
<Date Code>  
AZM+  
16S  
1,2  
1,2  
MLP 16 (3x3)  
RoHS Compliant /  
Lead(Pb) Free  
<Date Code>  
1
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape  
& Reel.  
2
3
Date code format: “Y” or “YY” for year followed by “WW” for week.  
Date code “YWW” or “YYWW” on underside of part.  
DESCRIPTION  
The AZ10/100EP16VS is a Silicon–Germanium (SiGe) differential receiver with variable output swing. The  
EP16VS has functionality and output transition times similar to the EP16, with an input that controls the amplitude  
of the Q/Q¯ outputs.  
Connecting the BOOST pin to VEE increases the output swing by about 15% above standard ECL/PECL levels.  
The BOOST pin is internally tied to VEE for the SOIC 8 and TSSOP 8 packages, and is under external user control  
for the MLP 16 package. When both the BOOST pin and the VCTRL pin are not connected, the part operates with the  
standard ECL/PECL output and VBB levels of the AZ10/100EP16 device. To ensure best performance, the BOOST  
pin should be tied to VEE when the variable swing feature is used.  
The operational range of the EP16VS control input, VCTRL, is from VREF (full swing) to VCC (min. swing).  
Maximum swing is achieved by leaving the VCTRL pin open or tied to VEE. Simple control of the output swing can be  
obtained by a variable resistor between the VREF and VCC pins, with the wiper driving VCTRL. Typical application  
circuits and results are described in this Data Sheet.  
The EP16VS provides a VREF (VBB/VREF) output for a DC bias when AC coupling to the device. The VREF pin  
should be used only as a bias for the EP16VS as its current sink/source capability is limited. Whenever used, the  
V
REF pin should be bypassed to ground via a 0.01μF capacitor.  
Under open input conditions for D/D¯, the Q/Q¯ outputs are not guaranteed.  
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.  
1630 S. STAPLEY DR., SUITE 127 MESA, ARIZONA 85204 USA (480) 962-5881 FAX (480) 890-2541  
www.azmicrotek.com  

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