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AZ100LVEL16T+ PDF预览

AZ100LVEL16T+

更新时间： 2024-09-19 04:33:23
品牌 Logo 应用领域
AZM 光电二极管
页数 文件大小 规格书
7页 82K
描述
ECL/PECL Differential Receiver

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中文翻译

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AZ100LVEL16T+ 技术参数

是否Rohs认证： 符合生命周期：Contact Manufacturer
包装说明：TSSOP, TSSOP8,.19Reach Compliance Code：compliant
风险等级：5.74Is Samacsys：N
JESD-30 代码：R-PDSO-G8标称负供电电压：-4.5 V
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP8,.19
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：-4.5 V认证状态：Not Qualified
最大接收延迟：0.405 ns子类别：Line Driver or Receivers
最大压摆率：24 mA表面贴装：YES
技术：ECL100K温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUALBase Number Matches：1

AZ100LVEL16T+ 数据手册

 浏览型号AZ100LVEL16T+的Datasheet PDF文件第2页浏览型号AZ100LVEL16T+的Datasheet PDF文件第3页浏览型号AZ100LVEL16T+的Datasheet PDF文件第4页浏览型号AZ100LVEL16T+的Datasheet PDF文件第5页浏览型号AZ100LVEL16T+的Datasheet PDF文件第6页浏览型号AZ100LVEL16T+的Datasheet PDF文件第7页 
ARIZONA MICROTEK, INC.  
AZ10LVEL16  
AZ100LVEL16  
ECL/PECL Differential Receiver  
PACKAGE AVAILABILITY  
FEATURES  
PACKAGE  
PART NUMBER MARKING NOTES  
•
Green and RoHS Compliant / Lead (Pb)  
Free Packages available  
250ps Propagation Delay  
High Bandwidth Output Transitions  
Operating Range of 3.0V to 5.5V  
Internal Input Pulldown Resistors  
Direct Replacement For ON  
Semiconductor MC10EL16, MC100EL16,  
& MC100LVEL16  
AZM10  
SOIC 8  
AZ10LVEL16D  
1,2  
LVEL16  
AZM100  
LVEL16  
•
•
•
•
•
SOIC 8  
AZ100LVEL16D  
1,2  
SOIC 8 RoHS  
Compliant / Lead  
(Pb) Free  
AZM100+  
LVEL16  
AZ100LVEL16D+  
AZ10LVEL16T  
1,2  
1,2  
1,2  
1,2  
1,2  
AZT  
LV16  
TSSOP 8  
TSSOP 8 RoHS  
Compliant / Lead  
(Pb) Free  
•
IBIS Model Files Available on Arizona  
Microtek Website  
AZT+  
LV16  
AZ10LVEL16T+  
AZ100LVEL16T  
AZ100LVEL16T+  
AZH  
LV16  
TSSOP 8  
TSSOP 8 RoHS  
Compliant / Lead  
(Pb) Free  
AZH+  
LV16  
DESCRIPTION  
MLP 8 (2x2)  
Green / RoHS  
Compliant / Lead  
(Pb) Free  
The AZ10/100LVEL16 is a differential  
receiver. The device is functionally equivalent  
to the E116 device with higher performance  
capabilities. With output transition times  
significantly faster than the E116, the LVEL16  
is ideally suited for interfacing with high  
frequency sources.  
Q6G  
<Date Code>  
AZ100LVEL16NG  
1,3  
1
2
3
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)  
Tape & Reel.  
Date code format: “Y” or “YY” for year followed by “WW” for week on  
underside of part.  
Date code format: “Y” for year followed by “WW” for week.  
The LVEL16 provides a VBB output for  
single-ended use or a DC bias reference for AC coupling to the device. For single-ended input applications, the VBB  
reference should be connected to one side of the D/D¯ differential input pair. The input signal is then fed to the other  
D/D¯ input. The VBB pin can support 1.5 mA sink/source current. When used, the VBB pin should be bypassed to  
ground via a 0.01 μF capacitor.  
Under open input conditions internal input clamps will force the Q output LOW.  
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.  
PINOUT ASSIGNMENT  
PIN DESCRIPTION  
PIN  
D, D¯  
Q, Q¯  
VBB  
VCC  
VEE  
NC  
FUNCTION  
Data Inputs  
Data Outputs  
Reference Voltage Output  
Positive Supply  
Negative Supply  
No Connect  
1
2
3
4
8
VCC  
NC  
Q
7
6
5
D
D
Q
VEE  
VBB  
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541  
www.azmicrotek.com  
1234567

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