Datasheet > AZ100ELT23

AZ100ELT23

更新时间： 2024-11-08 04:33:23

品牌	Logo	应用领域
AZM		转换器
页数	文件大小	规格书
5页	67K
描述
Dual Differential PECL to CMOS/TTL Translator

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数据手册

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AZ100ELT23 数据手册

ARIZONA MICROTEK, INC.

AZ100ELT23

Dual Differential PECL to CMOS/TTL Translator

PACKAGE AVAILABILITY

FEATURES

PACKAGE

PART NUMBER

MARKING NOTES

AZM100

ELT23

•

Green / RoHS Compliant /

SOIC 8

AZ100ELT23D

1,2

Lead (Pb) Free package available

3.5ns Typical Propagation Delay

<500ps Typical Output to Output Skew

Differential PECL Inputs

CMOS/TTL Outputs

Flow Through Pinouts

SOIC 8 RoHS

Compliant / Lead

(Pb) Free

SOIC 8 Green /

RoHS Compliant /

Lead (Pb) Free

AZM100+

1,2

•

AZ100ELT23D+

ELT23

AZM100G

1,2,3

AZ100ELT23DG

AZ100ELT23T

AZ100ELT23T+

ELT23

AZH

1,2

Direct Replacement for ON

TSSOP 8

T23

Semiconductor MC100ELT23

Operating Range of 3.0V to 5.5V (For

operation down to 2.5V consult AZM)

Use AZ100ELT23 for 10K Applications

TSSOP 8 RoHS

Compliant / Lead

(Pb) Free

•

AZH+

1,2

T23

Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K

parts) Tape & Reel.

Date code format: “Y” or “YY” for year followed by “WW” for week on

underside of part.

The Green package mold compound is halogen free. The leads are plated

with 100% matte tin (Sn), eliminating lead (Pb). The Green package is

also RoHS compliant / Lead (Pb) Free.

DESCRIPTION

The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels

are used, only V_CCand ground are required. The small outline 8-lead packaging and the low skew, dual gate design

of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal.

The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V_BB

reference, the ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no

specified difference between the differential input 10K and 100K standards. Therefore the AZ100ELT23 can accept

any standard differential PECL input referenced from a V_CCof 3.0V to 5.5V.

NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.

LOGIC DIAGRAM AND PINOUT ASSIGNMENT

PIN DESCRIPTION

FUNCTION

Q0, Q1

CMOS/TTL Outputs

Differential PECL inputs

Positive Supply

DO, D¯¯0 – D1, D¯¯1

CMOS/TTL

PECL

V_CC

GND

Ground

GND

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5

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与AZ100ELT23相关器件

型号	品牌	获取价格	描述	数据表
AZ100ELT23_12	AZM	获取价格	Dual Differential PECL to CMOS/TTL Translator
AZ100ELT23D	AZM	获取价格	Dual Differential PECL to CMOS/TTL Translator
AZ100ELT23D+	AZM	获取价格	Dual Differential PECL to CMOS/TTL Translator
AZ100ELT23DG	AZM	获取价格	Dual Differential PECL to CMOS/TTL Translator
AZ100ELT23T	AZM	获取价格	Dual Differential PECL to CMOS/TTL Translator
AZ100ELT23T+	AZM	获取价格	Dual Differential PECL to CMOS/TTL Translator
AZ100EP16_12	AZM	获取价格	LVPECL Differential Receiver
AZ100EP16D	AZM	获取价格	ECL/PECL Differential Receiver
AZ100EP16FE	AZM	获取价格	ECL/PECL High Speed VCSEL Driver with Variable Output Swing or Limiting Amplifier
AZ100EP16FE_13	AZM	获取价格	PECL/ECL High Speed VCSEL Driver with Variable Output Swing or Limiting Amplifier

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