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AZ100EL16VSL PDF预览

AZ100EL16VSL

更新时间: 2024-11-08 04:33:23
品牌 Logo 应用领域
AZM /
页数 文件大小 规格书
8页 94K
描述
ECL/PECL Differential Receiver with Variable Output Swing

AZ100EL16VSL 技术参数

是否Rohs认证: 不符合生命周期:Contact Manufacturer
包装说明:,Reach Compliance Code:compliant
风险等级:5.82Base Number Matches:1

AZ100EL16VSL 数据手册

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ARIZONA MICROTEK, INC.  
AZ100EL16VS  
ECL/PECL Differential Receiver with Variable Output Swing  
FEATURES  
PACKAGE AVAILABILITY  
250ps Propagation Delay  
PACKAGE  
PART NUMBER  
MARKING  
NOTES  
High Bandwidth Output Transitions  
75kΩ Internal Input Pulldown Resistors  
Functionally Equivalent to ON  
Semiconductor MC100EL16  
Variable Output Swing  
AZM16P  
<Date Code>  
AZM100  
EL16VS  
AZH16VS  
MLP 8  
AZ100EL16VSL  
1,2  
SOIC 8  
AZ100EL16VSD  
AZ100EL16VST  
1,3  
1,3  
TSSOP 8  
1
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)  
Available in a 3x3mm MLP Package  
Tape & Reel.  
2
3
Date Code “YWW”  
Date Code “YWW” on underside of part.  
DESCRIPTION  
The AZ100EL16VS is a differential receiver with variable output swing. The EL16VS has functionality and  
output transition times similar to the EL16, with an input that controls the amplitude of the Q/Q¯ outputs. Maximum  
swing is achieved by leaving the VCTRL pin open or tied to VEE.  
The operational range of the EL16VS control input, VCTRL, is from VBB (full swing) to VCC (min. swing).  
Simple control of the output swing can be obtained by a variable resistor between the VBB and VCC pins, with the  
wiper driving VCTRL. Typical application circuits and results are described in this Data Sheet.  
The EL16VS provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device.  
For single-ended input applications, the VBB reference should be connected to one side of the D/D¯ differential input  
pair. The input signal is then fed to the other D/D¯ input. The VBB pin can support 1.0mA sink/source current.  
When used, the VBB pin should be bypassed to ground via a 0.01μF capacitor.  
Under open input conditions (pulled to VEE) internal input clamps will force the Q output LOW.  
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.  
1630 S. STAPLEY DR., SUITE 127 MESA, ARIZONA 85204 USA (480) 962-5881 FAX (480) 890-2541  
www.azmicrotek.com  

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