Datasheet > AZ100EL16VONG

AZ100EL16VONG

更新时间： 2024-11-10 03:19:19

品牌	Logo	应用领域
AZM		振荡器
页数	文件大小	规格书
18页	259K
描述
ECL/PECL Oscillator Gain Stage and Buffer with Enable

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AZ100EL16VONG 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.68
Base Number Matches：	1

AZ100EL16VONG 数据手册

ARIZONA MICROTEK, INC.

AZ10EL16VO

AZ100EL16VO

ECL/PECL Oscillator Gain Stage and Buffer with Enable

FEATURES

•

Green and RoHS Compliant Available

250ps Propagation Delay on Q¯ Output

High Voltage Gain vs. Standard EL16

For Oscillator Applications

Available in 2x2 or 3x3mm MLP Package

75kΩ Enable Pull-Down Resistor

S–Parameter (.s2p) and IBIS Model

Files Available on Arizona Microtek Website

DESCRIPTION

The AZ10/100EL16VO is an oscillator gain stage with a high gain output buffer including an enable. The

Q_HG/Q¯_HGoutputs have a voltage gain several times greater than the Q/Q¯ outputs. An enable input (E¯N¯ ) allows

continuous oscillator operation. When E¯N¯ is LOW or floating (NC), input data is passed to both sets of outputs.

When E¯N¯ is HIGH, the Q_HG/Q¯_HGoutputs will be forced LOW/HIGH respectively, while input data will continue to

be passed to the Q/Q¯ outputs. The E¯N¯ input can be driven with an ECL/PECL signal or a CMOS logic signal.

The input impedance of the D/D¯ inputs remain constant for all operating modes since forcing the outputs via the

E¯N¯ pin does not power-down the chip but only disables the high gain Q_HG/Q¯_HGoutputs.

Input protection diodes are included on the D/D¯ inputs for enhanced ESD protection.

The EL16VO also provides a V_BBoutput that supports 1.5mA sink/source current. When used, the V_BBpin

should be bypassed to ground or V_CCvia a 0.01μF capacitor.

Any used output must have an external pull down resistor. For 3.3V operation, an 180Ω resistor to V_EEis

recommended if an AC coupled load is present. At 5.0V, a 330Ω resistor is recommended for the AC load case.

Alternately, a 50Ω load terminated to V_CC– 2V or the Thevenin equivalent may be driven directly. Unused outputs

may be left floating (NC).

NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.

PIN/PAD DESCRIPTION

D/D¯

FUNCTION

Data Inputs

Q/Q¯

Q_HG/Q¯_HG

V_BB

Data Outputs

Q_HG

Data Outputs w/High Gain

Reference Voltage Output

Enable Input

E¯N¯

V_CC

Positive Supply

V_BB

V_EE

Negative Supply

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5 6 7...18

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与AZ100EL16VONG相关器件

型号	品牌	获取价格	描述	数据表
AZ100EL16VOT	AZM	获取价格	ECL/PECL Oscillator Gain Stage and Buffer with Enable
AZ100EL16VOT+	AZM	获取价格	ECL/PECL Oscillator Gain Stage and Buffer with Enable
AZ100EL16VOU	AZM	获取价格	LVPECL Oscillator Gain Stage & Buffer with Enable
AZ100EL16VOU+	AZM	获取价格	ECL/PECL Oscillator Gain Stage and Buffer with Enable
AZ100EL16VS	AZM	获取价格	ECL/PECL Differential Receiver with Variable Output Swing
AZ100EL16VS_06	ETC	获取价格	ECL/PECL Differential Receiver with Variable Output Swing
AZ100EL16VSD	AZM	获取价格	ECL/PECL Differential Receiver with Variable Output Swing
AZ100EL16VSDR1	ETC	获取价格	ECL/PECL Differential Receiver with Variable Output Swing
AZ100EL16VSDR2	ETC	获取价格	ECL/PECL Differential Receiver with Variable Output Swing
AZ100EL16VSL	AZM	获取价格	ECL/PECL Differential Receiver with Variable Output Swing

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