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AWT6135M7P8 PDF预览

AWT6135M7P8

更新时间: 2024-11-17 21:54:27
品牌 Logo 应用领域
ANADIGICS 电信集成电路放大器功率放大器过程控制系统PCS
页数 文件大小 规格书
8页 261K
描述
PCS/CDMA 3.4V/28dBm Linear Power Amplifier Module

AWT6135M7P8 技术参数

生命周期:Transferred零件包装代码:MODULE
包装说明:HLSON,针数:10
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.69Is Samacsys:N
JESD-30 代码:S-XDSO-N10长度:4 mm
功能数量:1端子数量:10
最高工作温度:85 °C最低工作温度:-30 °C
封装主体材料:UNSPECIFIED封装代码:HLSON
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE
认证状态:Not Qualified座面最大高度:1.56 mm
标称供电电压:3.4 V表面贴装:YES
电信集成电路类型:RF AND BASEBAND CIRCUIT温度等级:OTHER
端子形式:NO LEAD端子节距:0.85 mm
端子位置:DUAL宽度:4 mm
Base Number Matches:1

AWT6135M7P8 数据手册

 浏览型号AWT6135M7P8的Datasheet PDF文件第2页浏览型号AWT6135M7P8的Datasheet PDF文件第3页浏览型号AWT6135M7P8的Datasheet PDF文件第4页浏览型号AWT6135M7P8的Datasheet PDF文件第5页浏览型号AWT6135M7P8的Datasheet PDF文件第6页浏览型号AWT6135M7P8的Datasheet PDF文件第7页 
AWT6135  
PCS/CDMA 3.4V/28dBm  
Linear Power Amplifier Module  
PRELIMINARY DATA SHEET - Rev 1.1  
FEATURES  
InGaP HBT Technology  
High Efficiency: 40%  
Low Quiescent Current: 48 mA  
Low Leakage Current in Shutdown Mode: <1 µA  
VREF = +2.8 V (+2.7 V min over temp)  
Optimized for a 50 System  
Low Profile Miniature Surface Mount Package:  
1.56mm Max  
CDMA 1XRTT Compliant  
CDMA 1xEV-DO Compliant  
APPLICATIONS  
M7 Package  
PCS CDMA Wireless Handsets  
10 Pin 4mm x 4mm  
Surface Mount Module  
Dual Band CDMA Wireless Handsets  
PRODUCT DESCRIPTION  
The AWT6135 meets the increasing demands for  
higher efficiency and linearity in CDMA 1XRTT  
handsets. The PA module is optimized for VREF = +2.8 V,  
a requirement for compatibility with the Qualcomm®  
6000 chipset. The device is manufactured on an  
advanced InGaP HBT MMIC technology offering  
state-of-the-art reliability, temperature stability, and  
ruggedness. Selectable bias modes that optimize  
efficiency for different output power levels, and a  
shutdown mode with low leakage current, increase  
handset talk and standby time. The self-contained  
4mm x 4mm surface mount package incorporates  
matching networks optimized for output power,  
efficiency, and linearity in a 50 system.  
GND at slug (pad)  
1
2
3
4
5
10  
9
V
CC  
VCC  
RFIN  
GND  
RFOUT  
GND  
GND  
8
GND  
Bias Control  
7
V
MODE  
6
V
REF  
Figure 1: Block Diagram  
08/2003  

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