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AMMC-5618-W50 PDF预览

AMMC-5618-W50

更新时间: 2024-02-09 17:10:15
品牌 Logo 应用领域
安华高科 - AVAGO 射频和微波射频放大器微波放大器
页数 文件大小 规格书
8页 280K
描述
6 - 20 GHz Amplifier

AMMC-5618-W50 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:DIE OR CHIPReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.23其他特性:HIGH RELIABILITY
特性阻抗:50 Ω构造:COMPONENT
增益:12.5 dB最大输入功率 (CW):20 dBm
功能数量:1最大工作频率:20000 MHz
最小工作频率:6000 MHz封装等效代码:DIE OR CHIP
电源:5 V射频/微波设备类型:WIDE BAND LOW POWER
子类别:RF/Microwave Amplifiers最大压摆率:140 mA

AMMC-5618-W50 数据手册

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AMMC - 5618  
6 - 20 GHz Amplifier  
Data Sheet  
Description  
Avago Technologies’ AMMC-5618 6-20 GHz MMIC is an  
efficient two-stage amplifier designed to be used as a  
cascadable intermediate gain block for EW applications.  
In communication systems, it can be used as a LO buffer,  
or as a transmit driver amplifier. It is fabricated using a  
PHEMT integrated circuit structure that provides excep-  
tional efficiency and flat gain performance. During typi-  
cal operation with a single 5-V supply, each gain stage  
is biased for Class-A operation for optimal power output  
with minimal distortion. The RF input and output have  
matching circuitry for use in 50-W environments. The  
backside of the chip is both RF and DC ground. This helps  
simplify the assembly process and reduces assembly re-  
lated performance variations and costs. For improved re-  
liability and moisture protection, the die is passivated at  
the active areas. The MMIC is a cost effective alternative  
to hybrid (discrete FET) amplifiers that require complex  
tuning and assembly processes.  
Chip Size: 920 x 920 µm (36.2 x 36.2 mils)  
Chip Size Tolerance: ± 10µm (±0.4 mils)  
Chip Thickness: 100 ± 10µm (4 ± 0.4 mils)  
Pad Dimensions: 80 x 80 µm (3.1 x 3.1 mils or larger)  
Features  
Frequency Range: 6 - 20 GHz  
AMMC-5618 Absolute Maximum Ratings [1]  
High Gain: 14.5 dB Typical  
Symbol Parameters/ Conditions Units Min. Max.  
Output Power: 19.5 dBm Typical  
Input and Output Return Loss: < -12 dB  
Flat Gain Response: ± 0.3 dB Typical  
Single Supply Bias: 5 V @ 107 mA  
VD1, VD2 Drain Supply Voltage  
V
7
VG1  
VG2  
ID1  
ID2  
Pin  
Tch  
Tb  
Optional Gate Voltage  
Optional Gate Voltage  
Drain Supply Current  
Drain Supply Current  
RF Input Power  
V
-5  
-5  
+1  
+1  
70  
V
mA  
mA  
dBm  
°C  
84  
Applications  
20  
Driver/Buffer in microwave communication systems  
Channel Temp.  
+150  
Cascadable gain stage for EW systems  
Phased array radar and transmit amplifiers  
Operating Backside  
Temp.  
°C  
-55  
Tstg  
Storage Temp.  
°C  
°C  
-65 +165  
+300  
Tmax  
Maximum Assembly  
Temp. (60 sec max)  
Note:  
1. Operation in excess of any one of these conditions may result in  
permanent damage to this device.  
Note: These devices are ESD sensitive. The following precautions are strongly recommended:  
Ensure that an ESD approved carrier is used when dice are transported from one destination to another.  
Personal grounding is to be worn at all times when handling these devices.  

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