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AUIRGC4063B PDF预览

AUIRGC4063B

更新时间: 2024-09-10 14:49:19
品牌 Logo 应用领域
英飞凌 - INFINEON
页数 文件大小 规格书
5页 120K
描述
Insulated Gate Bipolar Transistor, 48A I(C), 600V V(BR)CES, N-Channel,

AUIRGC4063B 技术参数

生命周期:ActiveReach Compliance Code:compliant
风险等级:5.26Is Samacsys:N
最大集电极电流 (IC):48 A集电极-发射极最大电压:600 V
门极发射器阈值电压最大值:6.5 V门极-发射极最大电压:20 V
最高工作温度:175 °C极性/信道类型:N-CHANNEL
子类别:Insulated Gate BIP Transistors表面贴装:YES
Base Number Matches:1

AUIRGC4063B 数据手册

 浏览型号AUIRGC4063B的Datasheet PDF文件第2页浏览型号AUIRGC4063B的Datasheet PDF文件第3页浏览型号AUIRGC4063B的Datasheet PDF文件第4页浏览型号AUIRGC4063B的Datasheet PDF文件第5页 
PD - 97679  
AUTOMOTIVE GRADE  
AUIRGC4063B  
100% Tested at Probe *  
C
Features  
Designed for Automotive Applications**  
Low VCE (ON) Trench IGBT Technology  
Low switching losses  
Maximum junction temperature 175 °C  
5 μs SCSOA  
SquareRBSOA  
G
E
n-channel  
Positive VCE (ON) temperature co-efficient  
Tightparameterdistribution  
Benefits  
High Efficiency in a wide range of applications  
Suitable for a wide range of switching frequencies due  
to low VCE (ON) and low switching losses  
Ruggedtransientperformanceforincreasedreliability  
Excellent current sharing in parallel operation  
Low EMI  
VCE  
ICn  
Chip Type  
AUIRGC4063B  
Die Size  
4.32 mm x 5.89 mm  
Package  
Wafer  
600V  
48A  
Mechanical Parameter  
Die Size  
4.32 x 5.89  
mm  
75  
See Die Drawing  
0.556 x 0.503  
25.44 / 18  
70  
Minimum Street Width  
Emiter Pad Size (Included Gate Pad)  
Gate Pad Size  
Area Total / Active  
Thickness  
μm  
mm2  
μm  
mm  
150  
Wafer Size  
Flat Position  
0
Degrees  
Maximum-Possible Chips per Wafer  
Passivation Frontside  
Front Metal  
589 pcs  
Silicon Nitride  
Al, Si (4μm)  
Al (0.1 μm), Ti (0.1 um), Ni (0.4 um), Ag (0.6 μm)  
Electrically conductive epoxy or solder  
0.25mm diameter minimum  
Backside Metal  
Die Bond  
Reject Ink Dot Size  
Recommended Storage Environment  
Store in original container, in dry Nitrogen,  
<6 months at an ambient temperature of 23°C  
Note:  
* This IR product is 100% tested at wafer level and is manufactured using established, mature and well characterized processes. Due to  
restrictions in die level processing, die may not be equivalent to standard package products and are therefore offered with a conditional  
performance guarantee. The above data sheet is based on IR sample testing under certain predetermined and assumed conditions,  
and are provided for illustration purposes only. Customers are encouraged to perform testing in actual proposed package and use  
conditions. IR die products are tested using IR-based quality assurance procedures and are manufactured using IR’s established  
processes. Programs for customer-specified testing are available upon request. IR has experienced assembly yields of generally 95%  
or greater for individual die; however, customer’s results will vary. Estimates such as those described and set forth in this data sheet for  
semiconductor die will vary depending on a number of packaging, handling, use and other factors. Sold die may not perform on an  
equivalent basis to standard package products and are therefore offered with a limited warranty as described in IR’s applicable standard  
terms and conditions of sale. All IR die sales are subject to IR’s applicable standard terms and conditions of sale, which are available  
upon request. For customers requiring a particular parameter to be guaranteed, special testing can be carried out or product can  
bepurchased as known good die.  
** Technology qualified in sup-TO247 package according to AEC-Q101.  
www.irf.com  
1
05/31/11  

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