32.768kHz TCXO
ATXK-H11
3.28 x 2.58 x 1.36 mm
RoHS/RoHS II Compliant
MSL Level = 1
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Applications
Features
•
Frequency Stability options: ±3.8ppm over -10 to +60°C,
±5.0ppm over -40 to +85°C, & ±8.0ppm over -40 to +105°C
Output waveform CMOS
Low power consumption
Supply Voltage options: 3.3V, 2.5V, and 1.8V
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•
•
•
•
Frequency reference for real time clocks (RTCs)
Portable & wearable electronics
Internet of Things (IoT)
Consumer electronics
Timing synchronization for networks, servers, hubs, routers &
switches
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Electrical Specifications [Note 1]
Parameters
Frequency (fc)
Operating Temperature Range
Storage Temperature Range
Frequency Stability ∆f/fo vs:
Min.
Typ.
32.768
Max.
Units
kHz
°C
Notes
See Options
-40
-55
+105
+105
°C
Reference to fc (at 25°C±2°C), Pre-reflow
Tolerance
-2.5
-3.0
-5.0
+2.5
+3.0
+5.0
Reference to fc (at 25°C ±2°C), 24 hours after
reflow, one time
Tolerance
ppm
See Options Reference to frequency tolerance
reading (fo) at 25°C ±2°C
Temperature
Load ± 10%
Load Change
Supply Voltage Change
Aging
-0.2
-1.0
-3.0
+0.2
+1.0
+3.0
ppm/V
ppm
First year at +25°C±2°C
Timing error over time
(±5 ppm over -40°C to +85°C)
Reference to frequency tolerance reading (fo) at
25°C ±2°C
±0.432 sec/day; ±12.960 sec/month; ±2.628 minutes/year
Option E
+3.135
+2.375
+1.71
+3.3
+2.5
+1.8
1.0
+3.465
+2.625
+1.890
2.0
Option C
Supply Voltage (VDD
)
V
Option D
Without load
Pad 1 logic low
Supply Current (IDD
Disable Current
Start-up Time
)
µA
µA
sec
1.0
0.5
20% to 80% of waveform,15pF Load
Rise and Fall Time (Tr/Tf)
100
60
ns
Symmetry @ ½ VDD
Output Voltage
40
90%VDD
%
V
VOH
VOL
10%VDD
15
CMOS
Output Load
Output Waveform
pF
CMOS
“1” (VIH≥0.8*VDD): Oscillation;
“0” (VIL<0.2*VDD): No Oscillation/Hi Z
Tri-state function [Note 2]
V
Note 1: All measurements made over specified operating temperature range, at nominal VDD, and 15pf load, unless otherwise specified.
Note 2: Do not leave pad 1 (tri-state) floating (no connect). Pad 1 must be tied to Vdd (logic 1) for proper oscillation on pad 3.
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REVISED: 04-19-24