5秒后页面跳转
ATT505 PDF预览

ATT505

更新时间: 2022-02-26 13:56:51
品牌 Logo 应用领域
POSEICO /
页数 文件大小 规格书
4页 196K
描述
PHASE CONTROL MODULE

ATT505 数据手册

 浏览型号ATT505的Datasheet PDF文件第2页浏览型号ATT505的Datasheet PDF文件第3页浏览型号ATT505的Datasheet PDF文件第4页 
POSEICO SPA  
Via Pillea 42-44, 16153 Genova - ITALY  
Tel. + 39 010 8599400 - Fax + 39 010 8682006  
Sales Office:  
Tel. + 39 010 8599400 - sales@poseico.com  
PHASE CONTROL MODULE  
ATT505  
Repetitive voltage up to  
Mean forward current  
Surge current  
1800 V  
490 A  
13 kA  
FINAL SPECIFICATION  
apr 17 - ISSUE : 02  
Tj  
[°C]  
Symbol  
Characteristic  
Conditions  
Value  
Unit  
BLOCKING  
V RRM  
Repetitive peak reverse/off-state voltage  
Non-repetitive peak reverse voltage  
Repetitive peak reverse/off-state current  
130  
130  
130  
1800  
1900  
50  
V
V
V RSM  
I
I
RRM/DRM  
mA  
CONDUCTING  
T (AV)  
Mean forward current  
180° sin, 50 Hz, Tc=85°C, double side cooled  
180° sin, 50 Hz, Th=55°C, double side cooled  
490  
A
I
I
T (AV)  
TSM  
Mean forward current  
Surge forward current  
I² t  
722  
13  
A
kA  
Sine wave, 10 ms  
without reverse voltage  
130  
x 103  
I² t  
845  
1,50  
A²s  
V
V T  
On-state voltage  
Threshold voltage  
On-state slope resistance  
On-state current =  
1570 A  
25  
V T(TO)  
130  
130  
0,95  
V
r
T
0,300  
mohm  
SWITCHING  
From 75% VDRM up to 1000 A; gate 10V, 5W  
di/dt  
Critical rate of rise of on-state current, min.  
130  
200  
A/µs  
dv/dt  
Critical rate of rise of off-state voltage, min.  
Gate controlled delay time, typical  
Circuit commutated turn-off time, typical  
Reverse recovery charge  
Linear ramp up to 70% of VDRM  
130  
25  
500  
3,0  
V/µs  
µs  
VD=100V; gate source 25V, 10W , tr=.5 µs  
t
t
d
q
dv/dt = 20 V/µs linear up to 75% VDRM  
di/dt = -20 A/µs, I= 500 A  
VR= 100V  
160  
µs  
Q rr  
130  
µC  
A
I
I
I
rr  
Peak reverse recovery current  
Holding current, typical  
H
VD=12V, gate open circuit  
VD=12V, tp=30µs  
25  
25  
300  
700  
mA  
mA  
L
Latching current, typical  
GATE  
V GT  
Gate trigger voltage  
VD=12V  
25  
3,50  
V
I
GT  
Gate trigger current  
VD=12V  
25  
250  
0,25  
30  
mA  
V
V GD  
Non-trigger gate voltage, min.  
Peak gate voltage (forward)  
Peak gate current  
VD=VDRM  
130  
V FGM  
V
I
FGM  
10  
A
V RGM  
P GM  
P G  
Peak gate voltage (reverse)  
Peak gate power dissipation  
Average gate power dissipation  
5
V
Pulse width 100 µs  
150  
2
W
W
MOUNTING  
R th(j-c)  
Thermal impedance, DC  
Junction to case, per element  
Case to heatsink, per element  
70,0  
°C/kW  
R th(c-h)  
T j  
Thermal impedance  
Operating junction temperature  
RMS insulation voltage  
Mounting torque  
20,0  
-30 / 130  
3000  
°C/kW  
°C  
V ins  
T
50 hz , circuit to base, all terminal shorted  
Case to heatsink  
25  
V
4 to 6  
kN  
kN  
g
T
Mounting torque  
Busbars to terminal  
12 to 18  
1500  
Mass  
ORDERING INFORMATION : ATT505 S 18  
VRRM/100  
standard specification  

与ATT505相关器件

型号 品牌 描述 获取价格 数据表
ATT505S18 POSEICO PHASE CONTROL MODULE

获取价格

ATT571 POSEICO PHASE CONTROL MODULE

获取价格

ATT571S16 POSEICO PHASE CONTROL MODULE

获取价格

ATT605 POSEICO PHASE CONTROL MODULE

获取价格

ATT605S12 POSEICO PHASE CONTROL MODULE

获取价格

ATT621 POSEICO PHASE CONTROL MODULE

获取价格