Datasheet > 可编程逻辑 > 可编程逻辑器件> ATF22LV10CZ

ATF22LV10CZ

更新时间： 2024-02-18 18:27:19

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程逻辑器件
页数	文件大小	规格书
9页	226K
描述
High Performance E2 PLD

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技术参数
数据手册

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ATF22LV10CZ 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.59
Base Number Matches：	1

ATF22LV10CZ 数据手册

Features

3.0V to 5.5V Operating Range

Advanced Low Voltage, Zero Power,

Electrically Erasable Programmable Logic Device

•

Edge-Sensing “Zero” Power

Low Voltage Equivalent of ATF22V10CZ

“Zero” Standby Power (25 µA Maximum)

Ideal for Battery Powered Systems

25 ns Maximum Propagation Delay

CMOS and TTL Compatible Inputs and Outputs

•

High

Latch Feature Hold Inputs to Previous Logic States

•

Advanced E²Technology

•

Performance

E²PLD

Reprogrammable

100% Tested

High Reliability CMOS Process

•

20 Year Data Retention

100 Erase/Write Cycles

2,000V ESD Protection

200 mA Latchup Immunity

ATF22LV10CZ

Commercial and Industrial Temperature Ranges

Dual-in-Line and Surface Mount Standard Pinouts

•

Block Diagram

ATF22LV10CZ

TSSOP Top View

Pin Configurations

CLK/IN

VCC

I/O

Pin Name

CLK

Function

Clock

Logic Inputs

Bidirectional Buffers

(3 to 5.5V) Supply

I/O

V_CC

GND

DIP/SOIC

PLCC

Top view

Note: For PLCC, pins 1, 8, 15, and 22 can be left unconnected. For supe-

rior performance, connect V_CCto pin 1 and GND to pins 8, 15, and 22.

Rev. 0779E/LV10CZ-E–05/98

12 3 4 5 6 7...9

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