Features
• Industry Standard Architecture
– Emulates Many 24-Pin PALs®
– Low Cost Easy-to-Use Software Tools
• High-Speed Electrically Erasable Programmable Logic Devices
– 7.5 ns Maximum Pin-to-Pin Delay
• Several Power Saving Options
Device
ICC, Stand-By
50 mA
ICC, Active
55 mA
ATF20V8B
ATF20V8BQ
ATF20V8BQL
High-
35 mA
40 mA
Performance
EE PLD
5 mA
20 mA
• CMOS and TTL Compatible Inputs and Outputs
• Input and I/O Pull-Up Resistors
• Advanced Flash Technology
– Reprogrammable
– 100% Tested
• High Reliability CMOS Process
– 20 Year Data Retention
ATF20V8B
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Commercial and Industrial Temperature Ranges
• Dual-in-Line and Surface Mount Packages in Standard Pinouts
Block Diagram
TSSOP Top View
Pin Configurations
CLK/IN
IN
1
24
23
22
21
20
19
18
17
16
15
14
13
VCC
IN
2
Pin Name Function
IN
3
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
IN
4
IN
5
CLK
I
Clock
IN
6
IN
7
IN
8
Logic Inputs
IN
9
IN
10
11
12
IN
I/O
OE
*
Bidirectional Buffers
Output Enable
No Internal Connection
+5V Supply
GND
OE/IN
DIP/SOIC
PLCC Top View
VCC
Rev. 0407E–05/98
1