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ATF1500A-10AI PDF预览

ATF1500A-10AI

更新时间: 2024-02-02 23:59:17
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件输入元件时钟
页数 文件大小 规格书
16页 683K
描述
High Performance E2 PLD

ATF1500A-10AI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:QCCJ,
Reach Compliance Code:compliant风险等级:2.34
JESD-30 代码:S-PQCC-J44JESD-609代码:e3
长度:16.586 mm湿度敏感等级:3
专用输入次数:I/O 线路数量:32
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C组织:0 DEDICATED INPUTS, 32 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
可编程逻辑类型:FLASH PLD传播延迟:10 ns
认证状态:Not Qualified座面最大高度:4.572 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:16.586 mmBase Number Matches:1

ATF1500A-10AI 数据手册

 浏览型号ATF1500A-10AI的Datasheet PDF文件第2页浏览型号ATF1500A-10AI的Datasheet PDF文件第3页浏览型号ATF1500A-10AI的Datasheet PDF文件第4页浏览型号ATF1500A-10AI的Datasheet PDF文件第5页浏览型号ATF1500A-10AI的Datasheet PDF文件第6页浏览型号ATF1500A-10AI的Datasheet PDF文件第7页 
Features  
High Density, High Performance Electrically Erasable Complex  
Programmable Logic Device  
– 44-Pin, 32 I/O CPLD  
– 7.5 ns Maximum Pin-to-Pin Delay  
– Registered Operation Up To 125 MHz  
– Fully Connected Input and Feedback Logic Array  
– Backward Compatibility with ATF1500/L Software and Hardware  
Flexible Logic Macrocell  
D/T/Latch Configurable Flip Flops  
– Global and Individual Register Control Signals  
– Global and Individual Output Enable  
– Programmable Output Slew Rate  
Advanced Power Management Features  
– Automatic 3 mA Stand-By (ATF1500AL)  
– Pin-Controlled 5 µA Stand-By Mode (Typical)  
– Programmable Pin-Keeper Inputs and I/Os  
Available in Commercial and Industrial Temperature Ranges  
Available in 44-Pin PLCC and TQFP Packages  
Advanced Flash Technology  
High  
Performance E2  
PLD  
ATF1500A/AL  
– 100% Tested  
– Completely Reprogrammable  
– 100 Program/Erase Cycles  
– 20 Year Data Retention  
– 2000V ESD Protection  
– 200 mA Latch-Up Immunity  
Supported By Popular 3rd Party Tools  
Security Fuse Feature  
Description  
The ATF1500A is a high performance, high density Complex PLD. Built on an  
advanced Flash technology, it has maximum pin to pin delays of 7.5 ns and supports  
sequential logic operation at speeds up to 125 MHz. With 32 logic macrocells and up  
to 36 inputs, it easily integrates logic from several TTL, SSI, MSI and classic PLDs.  
The ATF1500A's global input and feedback architecture simplifies logic placement  
and eliminates pinout changes due to design changes.  
(continued)  
Pin Configurations  
Pin  
Name  
CLK  
I
Function  
Clock  
PLCC  
TQFP  
I N D E X  
C O R N E R  
Logic Inputs  
4 4 4 2 4 0  
3 6 3 4  
3 8  
Bidirectional  
Buffers  
4 3 4 1 3 9 3 7 3 5  
I/O  
I / O  
I / O  
I / O  
I / O  
I / O  
I / O  
I / O  
G N D  
I / O  
I / O  
I / O  
I / O  
V C C  
I / O  
I / O  
1
3 3  
3 2  
3 1  
3 0  
2 9  
2
3
4
5
6
7
8
9
Register Reset  
(active low)  
V C C  
I / O  
I / O  
I / O  
GCLR  
2 8  
2 7  
2 6  
2 5  
2 4  
2 3  
OE1,  
OE2  
Output Enable  
(active low)  
I / O  
G N D  
I / O  
1 0  
1 1  
1 3 1 5 1 7 1 9 2 1  
1 6  
1 2 1 4  
1 8 2 0 2 2  
VCC  
PD  
+5V Supply  
Power Down  
(active high)  
Rev. 0759C–04/98  
Top View  
Top View  

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