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5962-8867005LA PDF预览

5962-8867005LA

更新时间： 2024-02-21 21:37:10
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟输入元件可编程逻辑
页数 文件大小 规格书
11页 188K
描述
OT PLD, 15ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24

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5962-8867005LA 技术参数

生命周期：Active包装说明：DIP, DIP24,.3
Reach Compliance Code：compliantECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01风险等级：5.26
其他特性：10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS架构：PAL-TYPE
最大时钟频率：50 MHzJESD-30 代码：R-GDIP-T24
JESD-609代码：e0长度：31.877 mm
专用输入次数：11I/O 线路数量：10
输入次数：22输出次数：10
产品条款数：132端子数量：24
最高工作温度：125 °C最低工作温度：-55 °C
组织：11 DEDICATED INPUTS, 10 I/O输出函数：MACROCELL
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP24,.3封装形状：RECTANGULAR
封装形式：IN-LINE电源：5 V
可编程逻辑类型：OT PLD传播延迟：15 ns
认证状态：Qualified筛选级别：38535Q/M;38534H;883B
座面最大高度：5.08 mm子类别：Programmable Logic Devices
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：TIN LEAD端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

5962-8867005LA 数据手册

 浏览型号5962-8867005LA的Datasheet PDF文件第2页浏览型号5962-8867005LA的Datasheet PDF文件第3页浏览型号5962-8867005LA的Datasheet PDF文件第4页浏览型号5962-8867005LA的Datasheet PDF文件第5页浏览型号5962-8867005LA的Datasheet PDF文件第6页浏览型号5962-8867005LA的Datasheet PDF文件第7页 
AT22V10/L  
Features  
High Speed Programmable Logic Device  
•
15 ns Max Propagation Delay  
5 V 10% Operation  
Low Power CMOS Operation  
•
Speed  
Temp  
"L"  
Com./Mil. Com./Mil. Others  
12/15 90/100 55  
-15,-20  
All  
I (mA)  
CC  
High Speed  
CMOS and TTL Compatible Inputs and Outputs  
10 µA Leakage Maximum  
Reprogrammable - Tested 100% for Programmability  
High Reliability CMOS Technology  
2000 V ESD Protection  
200 mA Latchup Immunity  
Full Military, Commercial and Industrial Temperature Ranges  
Dual-In-Line and Surface Mount Packages  
•
UV Erasable  
Programmable  
Logic Device  
•
•
•
•
Logic Diagram  
OE PRODUCT TERMS  
PROGRAMMABLE  
INTERCONNECT  
AND  
12  
LOGIC  
OPTION  
10  
I/O PINS  
OUTPUT  
OPTION  
INPUT PINS  
COMBINATORIAL  
LOGIC ARRAY  
8 TO 16  
PRODUCT  
TERMS  
(UP T0 10  
FLIP-FLOPS)  
1
Description  
The AT22V10 and AT22V10L are CMOS high performance EPROM-based Programma-  
ble Logic Devices (PLDs). Speeds down to 15 ns and power dissipation as low as 12 mA  
are offered. All speed ranges are specified over the full 5 V 10% range. All pins offer a  
low 10 µA leakage.  
The AT22V10L provides the optimum low power CMOS PLD solution, with low DC power  
(8 mA typical) and full CMOS output levels. The AT22V10L significantly reduces total  
system power and enhances system reliability.  
Full CMOS output levels help reduce power in many other system components.  
The AT22V10 and AT22V10L incorporate a variable product term architecture. Each out-  
put is allocated from eight to 16 product terms, which allows highly complex logic functions  
to be realized.  
Two additional product terms are included to provide synchronous preset and asynchro-  
nous reset. These terms are common to all 10 registers. All registers are automatically  
cleared upon power up.  
Register preload simplifies testing. A security fuse prevents unauthorized copying of pro-  
grammed fuse patterns.  
DIP/SOIC  
PLCC  
CLK/IN  
IN IN  
VCC  
I/O  
22  
CLK/IN  
IN  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Vcc  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
IN  
*
Pin Configurations  
I/O  
1
IN  
IN  
3
4
5
6
Pin Name  
Function  
IN  
IN  
IN  
I/O  
I/O  
I/O  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
CLK/IN  
IN  
Clock and Logic Input  
Logic Inputs  
8
*
IN  
IN  
IN  
*
I/O  
I/O  
7
8
9
10  
11  
12  
I/O  
Bidirectional Buffers  
No Internal Connection  
+5 V Supply  
I/O  
15  
*
*
I/O  
IN  
GND  
VCC  
0023C  
I/O  
IN GND IN  
1-97  
1234567...11

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