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5962-0325002QXC PDF预览

5962-0325002QXC

更新时间: 2024-02-06 07:38:33
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑
页数 文件大小 规格书
42页 759K
描述
Field Programmable Gate Array, 2304 CLBs, 46000 Gates, 2304-Cell, CMOS, PQFP160, MQFP-160

5962-0325002QXC 技术参数

生命周期:Transferred零件包装代码:QFP
包装说明:QFF, QFL160,1.0SQ,25针数:160
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.39.00.01风险等级:5.26
JESD-30 代码:S-PQFP-F160长度:27.2 mm
可配置逻辑块数量:2304等效关口数量:46000
输入次数:129逻辑单元数量:2304
输出次数:129端子数量:160
最高工作温度:125 °C最低工作温度:-55 °C
组织:2304 CLBS, 46000 GATES封装主体材料:PLASTIC/EPOXY
封装代码:QFF封装等效代码:QFL160,1.0SQ,25
封装形状:SQUARE封装形式:FLATPACK
电源:3.3 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Qualified筛选级别:MIL-PRF-38535 Class Q
座面最大高度:2.66 mm子类别:Field Programmable Gate Arrays
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:FLAT端子节距:0.65 mm
端子位置:QUAD宽度:27.2 mm
Base Number Matches:1

5962-0325002QXC 数据手册

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Features  
SRAM based FPGA Dedicated to Space Use  
SEE Hardened Cells (configuration RAM, FreeRAM, DFF, JTAG, I/O buffers) Remove the  
need for Triple Modular Redundancy (TMR)  
Produced on Rad Hard 0.35µm CMOS Process  
Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series  
High Performance  
– 46K Available ASIC gates (50% typ. routable)  
– 60 MHz Internal Performance  
– 20 MHz System Performance  
– 30 MHz Array Multipliers  
Rad Hard  
– 18 ns FreeRAMaccess time  
– Internal Tri-state Capability in Each Cell  
FreeRAM  
Reprogrammable  
FPGAs with  
FreeRAM  
– 18432 Bits of Distributed SRAM Independent of Logic Cells  
– Flexible, Single/Dual Port, Synchronous/Asynchronous 32x4 RAM blocks  
8 Global Clocks and 4 Additional Dedicated PCI Clocks  
– Fast, Low Skew Clock Distribution  
– Programmable Rising/Falling Edge Transitions  
– Distributed Clock Shutdown Capability for Low Power Management  
Global Reset Option  
AT40KEL040  
AT40KFL040  
384 PCI Compliant I/Os  
– Programmable Output Drive  
– Fast, Flexible Array Access Facilitates Pin Locking  
Package Options  
– MQFPF160  
– MQFPF256  
Design Software (System Designer)  
– Combination of Atmel internally developed tools, and industry standard design  
tools  
– Fast and Efficient Synthesis  
– Efficient Integration (Libraries, Interface, Full Back-annotation)  
– Over 75 Automatic Component Generators Create Thousands  
of Speed and Area Optimized Logic and RAM Functions  
– Automatic/Interactive Multi-chip Partitioning  
Supply Voltage 3.3V  
AT40KFL040 is a 5V Tolerant Version  
No Single Event Latch-up below a LET Threshold of 70 MeV/mg/cm2  
Tested up to a Total Dose of 300 krads (Si) according to MIL STD 883 Method 1019  
Quality Grades  
– QML -Q and -V with SMD 5962-03250  
– ESCC with 9304/008  
Design Kit (AT40KEL-DK) Including:  
– A Board with the RH FPGA (MQFPF160 or MQFPF256)  
– A configuration memory (AT17 Atmel EEPROM)  
– Design software and documentation  
– ISP cable and software  
Easy Migration to Atmel Gate Arrays for High Volume Production  
Note:  
All features and characteristics described for  
AT40KEL040 in this document, also apply to the  
AT40KFL040 unless specified otherwise.  
4155I–AERO–06/06  

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