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5962-0324601Q9A PDF预览

5962-0324601Q9A

更新时间: 2024-01-24 20:03:28
品牌 Logo 应用领域
爱特美尔 - ATMEL 外围集成电路时钟
页数 文件大小 规格书
42页 3365K
描述
Low-Voltage Rad-Hard 32-bit SPARC Embedded Processor

5962-0324601Q9A 技术参数

生命周期:Active包装说明:DIE,
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.31.00.01风险等级:5.71
地址总线宽度:32位大小:32
边界扫描:YES最大时钟频率:30.3 MHz
外部数据总线宽度:32格式:FLOATING POINT
集成缓存:NOJESD-30 代码:X-XUUC-N
低功率模式:YES最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP认证状态:Qualified
筛选级别:MIL-PRF-38535 Class Q速度:15 MHz
最大供电电压:3.45 V最小供电电压:3.15 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:NO LEAD端子位置:UPPER
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISCBase Number Matches:1

5962-0324601Q9A 数据手册

 浏览型号5962-0324601Q9A的Datasheet PDF文件第2页浏览型号5962-0324601Q9A的Datasheet PDF文件第3页浏览型号5962-0324601Q9A的Datasheet PDF文件第4页浏览型号5962-0324601Q9A的Datasheet PDF文件第5页浏览型号5962-0324601Q9A的Datasheet PDF文件第6页浏览型号5962-0324601Q9A的Datasheet PDF文件第7页 
Features  
Integer Unit Based on SPARC V7 High-performance RISC Architecture  
Optimized Integrated 32/64-bit Floating-point Unit  
On-chip Peripherals  
– EDAC and Parity Generator and Checker  
– Memory Interface  
Chip Select Generator  
Waitstate Generation  
Memory Protection  
– DMA Arbiter  
– Timers  
Low-Voltage  
Rad-Hard 32-bit  
SPARC  
General Purpose Timer (GPT)  
Real-time Clock Timer (RTCT)  
Watchdog Timer (WDT)  
– Interrupt Controller With 5 External Inputs  
– General Purpose Interface (GPI)  
– Dual UART  
Embedded  
Processor  
Speed Optimized Code RAM Interface  
8- or 40-bit boot-PROM (Flash) Interface  
IEEE 1149.1 Test Access Port (TAP) for Debugging and Test Purposes  
Fully Static Design  
Performance: 12 MIPs/3 MFlops (Double Precision) at SYSCLK = 15 MHz  
Core Consumption: 0.3W Typ. at 12 MIPs  
Operating Range: 3.15V to 3.45V -55°C to +125°C  
Tested up to a Total Dose of 300 Krds (si) according toMIL STD 883 Method 1019  
No Single Event Latch-up Below an LET Threshold of 80 MeV/mg/cm2  
Single Event Upsets Error Rate Better than:  
– 2 E-7 Error/Component/Day in GEO Orbit  
– 5 E-5 Error/Component/Day in LEO Orbit (53°, 1000 km)  
Quality Grades: ESCC, and QMLQ or V with 5962-03246  
Package: 256 MQFPF; Bare Die  
TSC695FL  
Description  
The TSC695FL (ERC32 Single-Chip) is a highly integrated, high-performance 32-bit  
RISC embedded processor implementing the SPARC architecture V7 specification. It  
has been developed with the support of the ESA (European Space Agency), and  
offers a full development environment for embedded space applications.  
The processor is manufactured using the Atmel 0.5 µm radiation tolerant (300  
KRADs (Si)) CMOS enhanced process (RTP). It can operate at a low voltage for opti-  
mized power consumption (see datasheet TSC695FL). It has been specially designed  
for space, as it has on-chip concurrent transient and permanent error detection.  
The TSC695FL includes an on-chip Integer Unit (IU), a Floating Point Unit (FPU), a  
Memory Controller and a DMA arbiter. For real-time applications, the TSC695FL  
offers a high security watchdog, two timers, an interrupt controller, parallel and serial  
interfaces. Fault tolerance is supported using parity on internal/external buses and an  
EDAC on the external data bus. The design is highly testable with the support of an  
On-Chip Debugger (OCD), and a boundary scan through JTAG interface.  
The TSC695FL is a selection of the TSC5695F performed for a narrow 3.3V biasing  
voltage range (± 0.15V), as such, this specification can be only met by the products  
solds as TSC695FL. Where computing power is not the key factor, it allows for a dra-  
matic power consumption reduction (70%).  
Rev. 4204C–AERO–05/05  

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