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29C512 PDF预览

29C512

更新时间: 2022-11-25 16:15:55
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存
页数 文件大小 规格书
18页 285K
描述
512K 64K x 8 5-volt Only CMOS Flash Memory

29C512 数据手册

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Features  
Fast Read Access Time – 70 ns  
5-volt Only Reprogramming  
Sector Program Operation  
– Single Cycle Reprogram (Erase and Program)  
– 512 Sectors (128 Bytes/Sector)  
– Internal Address and Data Latches for 128 Bytes  
Internal Program Control and Timer  
Hardware and Software Data Protection  
Fast Sector Program Cycle Time – 10 ms  
DATA Polling for End of Program Detection  
Low Power Dissipation  
512K (64K x 8)  
5-volt Only  
Flash Memory  
– 50 mA Active Current  
– 100 µA CMOS Standby Current  
Typical Endurance > 10,000 Cycles  
Single 5V 10ꢀ Supply  
AT29C512  
CMOS and TTL Compatible Inputs and Outputs  
Commercial and Industrial Temperature Ranges  
Green (Pb/Halide-free) Packaging Option  
1. Description  
The AT29C512 is a 5-volt only in-system Flash programmable and erasable read only  
memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Man-  
ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers  
access times to 70 ns with power dissipation of just 275 mW over the commercial tem-  
perature range. When the device is deselected, the CMOS standby current is less  
than 100 µA. The device endurance is such that any sector can typically be written to  
in excess of 10,000 times.  
To allow for simple in-system reprogrammability, the AT29C512 does not require high  
input voltages for programming. Five-volt-only commands determine the operation of  
the device. Reading data out of the device is similar to reading from an EPROM.  
Reprogramming the AT29C512 is performed on a sector basis; 128 bytes of data are  
loaded into the device and then simultaneously programmed.  
During a reprogram cycle, the address locations and 128 bytes of data are internally  
latched, freeing the address and data bus for other operations. Following the initiation  
of a program cycle, the device will automatically erase the sector and then program  
the latched data using an internal control timer. The end of a program cycle can be  
detected by DATA polling of I/O7. Once the end of a program cycle has been  
detected, a new access for a read or program can begin.  
0456H–FLASH–2/05  

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