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ATF750CL-15SL PDF预览

ATF750CL-15SL

更新时间: 2024-11-02 13:05:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件输入元件时钟
页数 文件大小 规格书
16页 404K
描述
EE PLD, 15ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24

ATF750CL-15SL 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:24Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.7
Is Samacsys:N最大时钟频率:44 MHz
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.4 mm湿度敏感等级:2
专用输入次数:11I/O 线路数量:10
端子数量:24最高工作温度:70 °C
最低工作温度:组织:11 DEDICATED INPUTS, 10 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
可编程逻辑类型:EE PLD传播延迟:15 ns
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.5 mm
Base Number Matches:1

ATF750CL-15SL 数据手册

 浏览型号ATF750CL-15SL的Datasheet PDF文件第2页浏览型号ATF750CL-15SL的Datasheet PDF文件第3页浏览型号ATF750CL-15SL的Datasheet PDF文件第4页浏览型号ATF750CL-15SL的Datasheet PDF文件第5页浏览型号ATF750CL-15SL的Datasheet PDF文件第6页浏览型号ATF750CL-15SL的Datasheet PDF文件第7页 
Features  
Advanced, High-speed, Electrically-erasable Programmable Logic Device  
– Superset of 22V10  
– Enhanced Logic Flexibility  
– Backward Compatible with ATV750B/BL and ATV750/L  
Low-power Edge-sensing LOption with 1 mA Standby Current  
D- or T-type Flip-flop  
Product Term or Direct Input Pin Clocking  
7.5 ns Maximum Pin-to-pin Delay with 5V Operation  
Highest Density Programmable Logic Available in 24-pin Package  
Advanced Electrically-erasable Technology  
Reprogrammable  
100% Tested  
Increased Logic Flexibility  
42 Array Inputs, 20 Sum Terms and 20 Flip-flops  
Enhanced Output Logic Flexibility  
All 20 Flip-flops Feed Back Internally  
10 Flip-flops are also Available as Outputs  
Programmable Pin-keeper Circuits  
High-speed  
Complex  
Programmable  
Logic Device  
Dual-in-line and Surface Mount Package in Standard Pinouts  
Commercial and Industrial Temperature Ranges  
20-year Data Retention  
ATF750C  
ATF750CL  
2000V ESD Protection  
1000 Erase/Write Cycles  
Block Diagram  
(OE PRODUCT TERMS)  
PROGRAMMABLE  
INTERCONNECT  
AND  
COMBINATORIAL  
LOGIC ARRAY  
12  
INPUT  
PINS  
LOGIC  
OPTION  
4 TO 8  
PRODUCT  
TERMS  
10  
I/O  
PINS  
OUTPUT  
OPTION  
(UP T0 20  
FLIP-FLOPS)  
(CLOCK PIN)  
Description  
The ATF750C(L)s are twice as powerful as most other 24-pin programmable logic  
devices. Increased product terms, sum terms, flip-flops and output logic configurations  
translate into more usable gates. High-speed logic and uniform, predictable delays  
(continued)  
DIP/SOIC/TSSOP  
PLCC  
Pin Configurations  
CLK/IN  
IN  
1
2
3
4
5
6
7
8
9
24 VCC  
23 I/O  
22 I/O  
21 I/O  
20 I/O  
19 I/O  
18 I/O  
17 I/O  
16 I/O  
15 I/O  
14 I/O  
13 IN  
Pin Name Function  
IN  
CLK  
IN  
Clock  
IN  
IN  
IN  
*
5
6
7
8
9
25 I/O  
24 I/O  
23 I/O  
IN  
IN  
Logic Inputs  
IN  
22  
*
IN  
I/O  
*
Bi-directional Buffers  
No Internal Connection  
+5V Supply  
IN  
21 I/O  
20 I/O  
19 I/O  
IN  
IN 10  
IN 11  
IN  
IN 10  
IN 11  
VCC  
GND 12  
Rev. 0776F01/00  

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