ATF22LV10C

更新时间： 2024-11-19 22:50:15

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程逻辑器件
页数	文件大小	规格书
9页	244K
描述
High Performance E2 PLD

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中文翻译

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技术参数
数据手册

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ATF22LV10C 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.85	Is Samacsys：	N
Base Number Matches：	1

ATF22LV10C 数据手册

Features

3.0V to 5.5V Operating Range

Advanced Low Voltage Electricaly Erasable Programmable Logic Device

User Controlled Power Down Pin Option

Pin-Controlled Standby Power (10 µA Typical)

Well-Suited for Battery Powered Systems

10 ns Maximum Propagation Delay

CMOS and TTL Compatible Inputs and Outputs

Latch Feature Hold Inputs to Previous Logic States

•

Advanced Electrically Erasable Technology

•

High

Reprogrammable

100% Tested

Performance

E²PLD

High Reliability CMOS Process

•

20 Year Data Retention

100 Erase/Write Cycles

2,000V ESD Protection

200 mA Latchup Immunity

Commercial and Industrial Temperature Ranges

Dual-in-Line and Surface Mount Packages in Standard Pinouts

•

ATF22LV10C

Block Diagram

TSSOP Top View

Pin Configurations

Pin Name

CLK

Function

CLK/IN

VCC

I/O

Clock

ATF22LV10C

Logic Inputs

Bidirectional Buffers

(3V to 5.5V) Supply

IN/PD

I/O

V_CC

Programmable

Power Down

GND

(1)

DIP/SOIC

PLCC

Top view

Note: 1. For PLCC, pin 1, 8, 15, and 22 can be left unconnected. For superior

performance, connect V_CCto pin 1 and GND to 8, 15, and 22.

Rev. 0780E/LV10C-E–05/98

12 3 4 5 6 7...9

中文翻译

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