Datasheet > ATA6612C

ATA6612C

更新时间： 2023-12-06 20:03:28

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
312页	9522K
描述
The multi-chip LIN System-in-Package (SiP) is designed for LIN-bus node applications, supporting h

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ATA6612C 数据手册

Table 1-1. Pin Description (Continued)

Symbol Function

20⁽¹⁾

21⁽¹⁾

22⁽¹⁾

23⁽¹⁾

24⁽¹⁾

25⁽¹⁾

26⁽¹⁾

27⁽¹⁾

28⁽¹⁾

29⁽¹⁾

30⁽¹⁾

31⁽¹⁾

32⁽¹⁾

NRES

Watchdog and under voltage reset output (open drain)

WD_OSC External resistor for adjustable watchdog timing

MODE

KL_15

PVCC

VCC

Tie to ground – for factory use only

Connect to GND for normal watchdog operation or connect to VCC for debug mode

Ignition detection (edge sensitive)

Voltage regulator sense input

Voltage regulator output

Battery connection

LIN-transceiver enable input

NTRIG

WAKE

GND

LIN

Watchdog trigger input (negative edge)

System-basis-chip external wake-up input

Analog system GND

LIN-bus input/output

PD3

Port D 3 I/O line (INT1 OC2B/PCINT19)

Port D 4 I/O line (T0/XCK/PCINT20)

Ground

PD4

GND1

Microcontroller supply voltage (referred to as VCC pin in Section 5. “Microcontroller Block” on

page 27 and Section 6. “2-wire Serial Interface Characteristics” on page 276)

MCUVCC

GND2

Ground

Microcontroller supply voltage (referred to as VCC pin in Section 5. “Microcontroller Block” on

page 27 and Section 6. “2-wire Serial Interface Characteristics” on page 276)

MCUVCC

PB6

PB7

PD5

PD6

PD7

PB0

PB1

PB2

PB3

PB4

Port B 6 I/O line (TOSC1/XTAL1/PCINT6)

Port B 7 I/O line (TOSC2/XTAL2/PCINT7)

Port D 5 I/O line (T1/OC0B/PCINT21)

Port D 6 I/O line (AIN0/OC0A PCINT22)

Port D 7 I/O line (AIN1/PCINT23)

Port B 0 I/O line (ICP1/CLKO/PCINT0)

Port B 1 I/O line (OC1A/PCINT1)

Port B 2 I/O line (OC1B/SS/PCINT2)

Port B 3 I/O line (MOSI/OC2A/PCINT3)

Port B 4 I/O line (MISO/PCINT4)

Backside

Heat slug is connected to GND

Note:

1. This identifies the pins of the LIN SBC Atmel ATA6624

ATA6612C/ATA6613C [DATASHEET]

9111L–AUTO–11/14

1 2 345 6 7...312

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