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AT93C46A-10PU-1.8 PDF预览

AT93C46A-10PU-1.8

更新时间: 2024-11-27 02:52:31
品牌 Logo 应用领域
爱特美尔 - ATMEL 存储内存集成电路光电二极管异步传输模式ATM可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
15页 431K
描述
Three-wire Serial EEPROM

AT93C46A-10PU-1.8 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.71最大时钟频率 (fCLK):0.25 MHz
JESD-30 代码:R-PDIP-T8JESD-609代码:e3
长度:9.271 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:16
湿度敏感等级:1功能数量:1
端子数量:8字数:64 words
字数代码:64工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64X16封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:5.334 mm串行总线类型:MICROWIRE
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.8 V
标称供电电压 (Vsup):2.7 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

AT93C46A-10PU-1.8 数据手册

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Features  
Low-voltage and Standard-voltage Operation  
– 2.7 (VCC = 2.7V to 5.5V)  
– 1.8 (VCC = 1.8V to 5.5V)  
Three-wire Serial Interface  
2 MHz Clock Rate (5V) Compatibility  
Self-timed Write Cycle (10 ms max)  
High Reliability  
– Endurance: 1 Million Write Cycles  
– Data Retention: 100 Years  
Automotive Grade, Extended Temperature, and Lead-free/Halogen-free Devices  
Available  
8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP Packages  
Three-wire  
Serial EEPROM  
1K (64 x 16)  
Description  
The AT93C46A provides 1024 bits of serial electrically-erasable programmable read-  
only memory (EEPROM) organized as 64 words of 16 bits each. The device is opti-  
mized for use in many industrial and commercial applications where low-power and  
low-voltage operation are essential. The AT93C46A is available in space-saving 8-  
lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP packages.  
AT93C46A  
Note: Not recommended for new  
design; please refer to  
AT93C46E datasheet.  
The AT93C46A is enabled through the Chip Select pin (CS) and accessed via a three-  
wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock  
(SK). Upon receiving a Read instruction at DI, the address is decoded and the data is  
clocked out serially on the data output DO pin. The write cycle is completely self-timed  
and no separate erase cycle is required before write. The write cycle is only enabled  
when the part is in the erase/write enable state. When CS is brought high following the  
initiation of a write cycle, the DO pin outputs the ready/busy status of the part.  
The AT93C46A is available in 2.7V to 5.5V and 1.8V to 5.5V versions.  
Table 1. Pin Configuration  
8-lead PDIP  
Pin Name  
CS  
Function  
CS  
SK  
DI  
1
2
3
4
8
7
6
5
VCC  
DC  
Chip Select  
NC  
SK  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
DO  
GND  
DI  
8-lead SOIC  
DO  
GND  
VCC  
CS  
1
2
3
4
8
7
6
5
VCC  
SK  
DI  
DC  
Power Supply  
NC  
DO  
GND  
8-lead TSSOP  
CS  
1
2
3
4
8
VCC  
DC  
SK  
DI  
7
6
5
NC  
DO  
GND  
Rev. 0539K–SEEPR–2/07  

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