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AT89C2051X2 PDF预览

AT89C2051X2

更新时间: 2024-11-18 04:49:59
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存微控制器
页数 文件大小 规格书
19页 205K
描述
8-bit Microcontroller with 2K Bytes Flash

AT89C2051X2 数据手册

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Features  
Compatible with MCS®-51 Products  
2K Bytes of Reprogrammable Flash Memory  
– Endurance: 1,000 Write/Erase Cycles  
2.7V to 6V Operating Range  
Fully Static Operation: 0 Hz to 16 MHz  
Two-level Program Memory Lock  
128 x 8-bit Internal RAM  
15 Programmable I/O Lines  
Two 16-bit Timer/Counters  
Six Interrupt Sources  
Programmable Serial UART Channel  
Direct LED Drive Outputs  
8-bit  
Microcontroller  
with 2K Bytes  
Flash  
On-chip Analog Comparator  
Low-power Idle and Power-down Modes  
6 Clocks per Machine Cycle Operation  
Description  
The AT89C2051x2 is a low-voltage, high-performance CMOS 8-bit microcontroller  
with 2K bytes of Flash programmable memory. The device is manufactured using  
Atmel’s high-density nonvolatile memory technology and is compatible with the indus-  
try-standard MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on  
a monolithic chip, the Atmel AT89C2051x2 is a powerful microcomputer which pro-  
vides a highly-flexible and cost-effective solution to many embedded control  
applications.  
AT89C2051x2  
The AT89C2051x2 provides the following standard features: 2K bytes of Flash, 128  
bytes of RAM, 15 I/O lines, two 16-bit timer/counters, a five-vector, two-level interrupt  
architecture, a full duplex serial port, a precision analog comparator, on-chip oscillator  
and clock circuitry. In addition, the AT89C2051x2 is designed with static logic for oper-  
ation down to zero frequency and supports two software selectable power saving  
modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial  
port and interrupt system to continue functioning. The power-down mode saves the  
RAM contents but freezes the oscillator disabling all other chip functions until the next  
hardware reset.  
Furthermore, the AT89C2051x2 executes one machine cycle in 6 clock cycles, provid-  
ing twice the speed of the AT89C2051 device. The user gains the flexibility to divide  
input frequency crystals by 2 (using less expensive components), while keeping the  
same CPU power. Alternatively, the user can save on power consumption while keep-  
ing the same CPU power (oscillator power saving).  
Pin Configuration  
PDIP/SOIC  
RST/VPP  
(RXD) P3.0  
(TXD) P3.1  
XTAL2  
1
2
3
4
5
6
7
8
9
20 VCC  
19 P1.7  
18 P1.6  
17 P1.5  
XTAL1  
16 P1.4  
15 P1.3  
14 P1.2  
(INT0) P3.2  
(INT1) P3.3  
(TO) P3.4  
(T1) P3.5  
13 P1.1 (AIN1)  
12 P1.0 (AIN0)  
11 P3.7  
GND 10  
Rev. 3285B–MICRO–10/03  

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