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AT49F002-12JC PDF预览

AT49F002-12JC

更新时间: 2024-11-28 23:04:23
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存
页数 文件大小 规格书
20页 214K
描述
2-Megabit 256K x 8 5-volt Only Flash Memory

AT49F002-12JC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:QCCJ, LDCC32,.5X.6
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.37最长访问时间:120 ns
其他特性:HARDWARE DATA PROTECTION启动块:BOTTOM
命令用户界面:YES数据轮询:YES
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.97 mm内存密度:2097152 bit
内存集成电路类型:FLASH内存宽度:8
湿度敏感等级:2功能数量:1
部门数/规模:1,2,1,1端子数量:32
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:5 V
编程电压:5 V认证状态:Not Qualified
座面最大高度:3.55 mm部门规模:16K,8K,96K,128K
最大待机电流:0.0001 A子类别:Flash Memories
最大压摆率:0.09 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
切换位:YES类型:NOR TYPE
宽度:11.43 mmBase Number Matches:1

AT49F002-12JC 数据手册

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Features  
Single-voltage Operation  
– 5V Read  
– 5V Reprogramming  
Fast Read Access Time – 55 ns  
Internal Program Control and Timer  
Sector Architecture  
– One 16K Bytes Boot Block with Programming Lockout  
– Two 8K Bytes Parameter Blocks  
– Four Main Memory Blocks (One 32K Bytes, Three 64K Bytes)  
Fast Erase Cycle Time – 4 Seconds  
Byte-by-Byte Programming – 20 µs/Byte Typical  
Hardware Data Protection  
2-megabit  
(256K x 8)  
5-volt Only  
Flash Memory  
DATA Polling for End of Program Detection  
Low Power Dissipation  
– 25 mA Active Current  
– 100 µA CMOS Standby Current  
Typical 10,000 Write Cycles  
Green (Pb/Halide-free) Packaging Option  
AT49F002A  
AT49F002AN  
AT49F002AT  
AT49F002ANT  
1. Description  
The AT49F002A(N)(T) is a 5-volt only in-system reprogrammable Flash memory. Its  
2 megabits of memory is organized as 262,144 words by 8 bits. Manufactured with  
Atmel’s advanced nonvolatile CMOS technology, the device offers access times to  
55 ns with power dissipation of just 137 mW over the industrial temperature range.  
When the device is deselected, the CMOS standby current is less than 100 µA. For  
the AT49F002AN(T) pin 1 for the PLCC package and pin 9 for the TSOP package are  
no connect pins.  
To allow for simple in-system reprogrammability, the AT49F002A(N)(T) does not  
require high input voltages for programming. Five-volt-only commands determine the  
read and programming operation of the device. Reading data out of the device is sim-  
ilar to reading from an EPROM; it has standard CE, OE, and WE inputs to avoid bus  
contention. Reprogramming the AT49F002A(N)(T) is performed by erasing a block of  
data and then programming on a byte-by-byte basis. The byte programming time is a  
fast 20 µs. The end of a program cycle can be optionally detected by the DATA polling  
feature. Once the end of a byte program cycle has been detected, a new access for a  
read or program can begin. The typical number of program and erase cycles is in  
excess of 10,000 cycles.  
The device is erased by executing the erase command sequence; the device inter-  
nally controls the erase operations. There are two 8K byte parameter block sections,  
four main memory blocks, and one boot block.  
The device has the capability to protect the data in the boot block; this feature is  
enabled by a command sequence. The 16K-byte boot block section includes a repro-  
gramming lock out feature to provide data integrity. The boot sector is designed to  
contain user secure code, and when the feature is enabled, the boot sector is pro-  
tected from being reprogrammed.  
3354F–FLASH–2/05  

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