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AT45DB081A-RI PDF预览

AT45DB081A-RI

更新时间： 2024-11-24 04:33:27
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存
页数 文件大小 规格书
28页 414K
描述
8-megabit 2.7-volt Only Serial DataFlash

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中文翻译

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AT45DB081A-RI 数据手册

 浏览型号AT45DB081A-RI的Datasheet PDF文件第2页浏览型号AT45DB081A-RI的Datasheet PDF文件第3页浏览型号AT45DB081A-RI的Datasheet PDF文件第4页浏览型号AT45DB081A-RI的Datasheet PDF文件第5页浏览型号AT45DB081A-RI的Datasheet PDF文件第6页浏览型号AT45DB081A-RI的Datasheet PDF文件第7页 
Features  
• 100% Compatible to AT45DB081  
• Single 2.7V - 3.6V Supply  
• Serial Interface Architecture  
• Page Program Operation  
– Single Cycle Reprogram (Erase and Program)  
– 4096 Pages (264 Bytes/Page) Main Memory  
• Optional Page and Block Erase Operations  
• Two 264-byte SRAM Data Buffers – Allows Receiving of Data  
while Reprogramming of Nonvolatile Memory  
• Continuous Read Capability through Entire Array  
• Internal Program and Control Timer  
• Low Power Dissipation  
8-megabit  
2.7-volt Only  
Serial  
– 4 mA Active Read Current Typical  
– 2 µA CMOS Standby Current Typical  
• 13 MHz Max Clock Frequency  
• Hardware Data Protection Feature  
DataFlash®  
• Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3  
• CMOS and TTL Compatible Inputs and Outputs  
• Commercial and Industrial Temperature Ranges  
AT45DB081A  
Description  
The AT45DB081A is a 2.7-volt only, serial interface Flash memory suitable for  
in-system reprogramming. Its 8,650,752 bits of memory are organized as 4096 pages  
of 264 bytes each. In addition to the main memory, the AT45DB081A also contains  
two SRAM data buffers of 264 bytes each. The buffers allow receiving of data while  
a page in the main memory is being reprogrammed. Unlike conventional Flash  
(continued)  
Recommend using  
AT45DB081B for new  
designs.  
Pin Configurations  
TSOP Top View  
Pin Name  
Function  
Type 1  
CS  
Chip Select  
Serial Clock  
Serial Input  
Serial Output  
RDY/BUSY  
RESET  
WP  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
2
SCK  
SI  
3
NC  
4
NC  
5
VCC  
GND  
NC  
6
7
SO  
8
NC  
9
Hardware Page Write  
Protect Pin  
NC  
10  
11  
12  
13  
14  
WP  
CS  
SCK  
SI  
RESET  
Chip Reset  
Ready/Busy  
SO  
RDY/BUSY  
CBGA Top View  
through Package  
PLCC  
SOIC  
1
2
3
GND  
NC  
NC  
CS  
SCK  
SI  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
VCC  
NC  
2
A
3
NC  
SCK  
SI  
5
6
7
8
9
29 WP  
NC  
NC  
NC  
NC  
4
WP  
28 RESET  
27 RDY/BUSY  
26 NC  
B
C
D
E
F
5
RESET  
RDY/BUSY  
NC  
SO  
NC  
NC  
NC  
6
SO  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
7
25 NC  
SCK  
GND  
VCC  
8
NC  
NC 10  
NC 11  
NC 12  
NC 13  
24 NC  
9
NC  
23 NC  
CS RDY/BSY WP  
10  
11  
12  
13  
14  
NC  
22 NC  
NC  
SO  
NC  
NC  
SI  
RESET  
NC  
21 NC  
NC  
NC  
NC  
NC  
NC  
G
Rev. 1634D–01/01  
NC  
Note: PLCC package pins 16  
and 17 are DON’T CONNECT.  
1234567...28

中文翻译

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