AT29BV040A
Features
Single Supply Voltage, Range 2.7V to 3.6V
Single Supply for Read and Write
Software Protected Programming
Fast Read Access Time - 250 ns
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Low Power Dissipation
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15 mA Active Current
20 µA CMOS Standby Current
Sector Program Operation
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Single Cycle Reprogram (Erase and Program)
2048 Sectors (256 bytes/sector)
4 Megabit
(512K x 8)
Internal Address and Data Latches for 256-Bytes
Two 16 KB Boot Blocks with Lockout
Fast Sector Program Cycle Time - 20 ms Max.
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Single 2.7-volt
Battery-Voltage
CMOS Flash
Memory
Internal Program Control and Timer
DATA Polling for End of Program Detection
Typical Endurance > 10,000 Cycles
CMOS and TTL Compatible Inputs and Outputs
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Commercial and Industrial Temperature Ranges
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Description
The AT29BV040A is a 3-volt-only in-system Flash Programmable and Erasable Read
Only Memory (PEROM). Its 4 megabits of memory is organized as 524,288 words by
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology,
the device offers access times up to 250 ns, and a low 54 mW power dissipation.
When the device is deselected, the CMOS standby current is less than 20 µA. The
device endurance is such that any sector can typically be written to in excess of
10,000 times. The programming algorithm is compatible with other devices in Atmel’s
2.7-volt-only Flash memories.
Preliminary
To allow for simple in-system reprogrammability, the AT29BV040A does not require
high input voltages for programming. The device can be operated with a single 2.7V
to 3.6V supply. Reading data out of the device is similar to reading from an EPROM.
Reprogramming the AT29BV040A is performed on a sector basis; 256-bytes of data
are loaded into the device and then simultaneously programmed.
AT29BV040A
During a reprogram cycle, the address locations and 256-bytes of data are captured
at microprocessor speed and internally latched, freeing the address and data bus for
other operations. Following the initiation of a program cycle, the device will automat-
ically erase the sector and then program the latched data using an internal control
timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the
end of a program cycle has been detected, a new access for a read or program can
begin.
TSOP Top View
Type 1
Pin Configurations
Pin Name Function
A0 - A18
CE
Addresses
Chip Enable
Output Enable
Write Enable
OE
WE
I/O0 - I/O7 Data Inputs/Outputs
NC No Connect
0383B
4-23