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AT28LV64B-25JCT/R PDF预览

AT28LV64B-25JCT/R

更新时间: 2024-11-28 13:05:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器
页数 文件大小 规格书
9页 487K
描述
EEPROM, 8KX8, 250ns, Parallel, CMOS, PQCC32, PLASTIC, LCC-32

AT28LV64B-25JCT/R 技术参数

生命周期:Obsolete零件包装代码:QFJ
包装说明:QCCJ,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.27
最长访问时间:250 ns其他特性:AUTOMATIC WRITE
JESD-30 代码:R-PQCC-J32长度:13.97 mm
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:32字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL编程电压:3 V
认证状态:Not Qualified座面最大高度:3.55 mm
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.97 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD宽度:11.43 mm
Base Number Matches:1

AT28LV64B-25JCT/R 数据手册

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AT28LV64B  
Features  
Single 3.3V ± 10% Supply  
3-Volt-Only Read and Write Operation  
Software-Protected Programming  
Low Power Dissipation  
15 mA Active Current  
20 µA CMOS Standby Current  
Fast Read Access Time 200 ns  
Automatic Page Write Operation  
Internal Address and Data Latches for 64-Bytes  
Internal Control Timer  
64K (8K x 8)  
Low Voltage  
CMOS  
Fast Write Cycle Times  
Page Write Cycle Time: 10 ms Maximum  
1 to 64-Byte Page Write Operation  
DATA Polling for End of Write Detection  
High Reliability CMOS Technology  
E2PROM with  
Page Write and  
Software Data  
Protection  
Endurance: 10,000 Cycles  
Data Retention: 10 Years  
JEDEC Approved Byte-Wide Pinout  
Commercial and Industrial Temperature Ranges  
Description  
The AT28LV64B is a high-performance electrically erasable programmable read only  
memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits. Manu-  
factured with Atmel’s advanced nonvolatile CMOS technology, the device offers ac-  
cess times to 200 ns with power dissipation of just 54 mW. When the device is dese-  
lected, the CMOS standby current is less than 20 µA.  
The AT28LV64B is accessed like a static RAM for the read or write cycle without the  
need for external components. The device contains a 64-byte page register to allow  
(continued)  
Pin Configurations  
AT28LV64B  
Pin Name  
A0 - A12  
CE  
Function  
PDIP, SOIC  
Top View  
Addresses  
Chip Enable  
Output Enable  
Write Enable  
Data Inputs/Outputs  
No Connect  
OE  
WE  
I/O0 - I/O7  
NC  
DC  
Don’t Connect  
PLCC  
Top View  
TSOP  
Top View  
Note: PLCC package pins 1 and  
17 are DON’T CONNECT.  
0299C  
2-135  

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