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AT28C256 PDF预览

AT28C256

更新时间: 2024-11-23 22:56:39
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器
页数 文件大小 规格书
14页 765K
描述
256K 32K x 8 Paged CMOS E2PROM

AT28C256 数据手册

 浏览型号AT28C256的Datasheet PDF文件第2页浏览型号AT28C256的Datasheet PDF文件第3页浏览型号AT28C256的Datasheet PDF文件第4页浏览型号AT28C256的Datasheet PDF文件第5页浏览型号AT28C256的Datasheet PDF文件第6页浏览型号AT28C256的Datasheet PDF文件第7页 
AT28C256  
Features  
Fast Read Access Time - 150 ns  
Automatic Page Write Operation  
Internal Address and Data Latches for 64-Bytes  
Internal Control Timer  
Fast Write Cycle Times  
Page Write Cycle Time: 3 ms or 10 ms Maximum  
1 to 64-Byte Page Write Operation  
Low Power Dissipation  
50 mA Active Current  
256K (32K x 8)  
Paged  
200 µA CMOS Standby Current  
Hardware and Software Data Protection  
DATA Polling for End of Write Detection  
High Reliability CMOS Technology  
Endurance: 104 or 105 Cycles  
Data Retention: 10 Years  
CMOS  
E2PROM  
Single 5V ± 10% Supply  
CMOS and TTL Compatible Inputs and Outputs  
JEDEC Approved Byte-Wide Pinout  
Full Military, Commercial, and Industrial Temperature Ranges  
Description  
The AT28C256 is a high-performance Electrically Erasable and Programmable Read  
Only Memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-  
tured with Atmel’s advanced nonvolatile CMOS technology, the device offers access  
times to 150 ns with power dissipation of just 440 mW. When the device is deselected,  
the CMOS standby current is less than 200 µA.  
(continued)  
Pin Configurations  
TSOP  
Top View  
Pin Name  
A0 - A14  
CE  
Function  
AT28C256  
Addresses  
Chip Enable  
Output Enable  
Write Enable  
Data Inputs/Outputs  
No Connect  
OE  
WE  
I/O0 - I/O7  
NC  
DC  
Don’t Connect  
CERDIP, PDIP,  
FLATPACK, SOIC  
Top View  
LCC, PLCC  
Top View  
PGA  
Top View  
Note: PLCC package pins 1 and  
17 are DON’T CONNECT.  
0006F  
2-217  

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